diff options
| author | Karl Palsson <karlp@tweak.net.au> | 2022-05-04 00:41:45 +0200 |
|---|---|---|
| committer | Vegard Storheil Eriksen <zyp@jvnv.net> | 2022-07-27 23:03:11 +0200 |
| commit | b5cd432df8f336c90d530b5d55fda7f2c25472c2 (patch) | |
| tree | 8f1cbda9f677e6e97676649de7c6e9e00e201ab7 /adc/stm32_adc.h | |
| parent | c40eb0b2d6966760899d1d0c2743770ea130ff09 (diff) | |
adc: convert to new style
Converted the old STM32 headers to new style and copied offsets to
platform data.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Diffstat (limited to 'adc/stm32_adc.h')
| -rw-r--r-- | adc/stm32_adc.h | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/adc/stm32_adc.h b/adc/stm32_adc.h new file mode 100644 index 0000000..6216581 --- /dev/null +++ b/adc/stm32_adc.h @@ -0,0 +1,83 @@ +#pragma once + +#include <mmio/mmio.h> + +struct STM32_ADC_reg_v1_t { + volatile uint32_t SR; + volatile uint32_t CR1; + volatile uint32_t CR2; + volatile uint32_t SMPR1; + volatile uint32_t SMPR2; + volatile uint32_t JOFR1; + volatile uint32_t JOFR2; + volatile uint32_t JOFR3; + volatile uint32_t JOFR4; + volatile uint32_t HTR; + volatile uint32_t LTR; + volatile uint32_t SQR1; + volatile uint32_t SQR2; + volatile uint32_t SQR3; + volatile uint32_t JSQR; + volatile uint32_t JDR1; + volatile uint32_t JDR2; + volatile uint32_t JDR3; + volatile uint32_t JDR4; + volatile uint32_t DR; +}; + + +struct STM32_ADC_reg_v2_t { + volatile uint32_t ISR; + volatile uint32_t IER; + volatile uint32_t CR; + volatile uint32_t CFGR; + volatile uint32_t CFGR2; + volatile uint32_t SMPR1; + volatile uint32_t SMPR2; + uint32_t _reserved1; + volatile uint32_t TR1; + volatile uint32_t TR2; + volatile uint32_t TR3; + uint32_t _reserved2; + volatile uint32_t SQR1; + volatile uint32_t SQR2; + volatile uint32_t SQR3; + volatile uint32_t SQR4; + volatile uint32_t DR; + uint32_t _reserved3[2]; + volatile uint32_t JSQR; + uint32_t _reserved4[4]; + volatile uint32_t OFR1; + volatile uint32_t OFR2; + volatile uint32_t OFR3; + volatile uint32_t OFR4; + uint32_t _reserved5[4]; + volatile uint32_t JDR1; + volatile uint32_t JDR2; + volatile uint32_t JDR3; + volatile uint32_t JDR4; + uint32_t _reserved6[4]; + volatile uint32_t AWD2CR; + volatile uint32_t AWD3CR; + uint32_t _reserved7[2]; + volatile uint32_t DIFSEL; + volatile uint32_t CALFACT; +}; + +struct STM32_ADC_COMMON_reg_v2_t { + volatile uint32_t CSR; + uint32_t _reserved1; + volatile uint32_t CCR; +}; + +template <typename T> +class STM32_ADC_t : public mmio_ptr<T> { + public: + using mmio_ptr<T>::ptr; +}; + +template <typename T> +class STM32_ADC_COMMON_t : public mmio_ptr<T> { + public: + using mmio_ptr<T>::ptr; +}; |