diff options
| author | Vegard Storheil Eriksen <zyp@jvnv.net> | 2022-09-10 20:23:36 +0200 | 
|---|---|---|
| committer | Vegard Storheil Eriksen <zyp@jvnv.net> | 2022-09-10 20:23:36 +0200 | 
| commit | bab201ae1db6905b8c3ad1b7dd1cdd65d8192120 (patch) | |
| tree | 803d470d8aa981819afd1627fd55697702152e26 /dma | |
| parent | 37a375c6b7dd83d2ac23069481c566bd9f9a7fd3 (diff) | |
litex: Add DMA.
Diffstat (limited to 'dma')
| -rw-r--r-- | dma/SConscript | 27 | ||||
| -rw-r--r-- | dma/litex_dma.h | 24 | 
2 files changed, 47 insertions, 4 deletions
| diff --git a/dma/SConscript b/dma/SConscript index 2ee2444..b559fe0 100644 --- a/dma/SConscript +++ b/dma/SConscript @@ -1,6 +1,6 @@  Import('env') -headers = [] +headers = set()  instances = []  sources = []  aliases = {} @@ -8,22 +8,41 @@ aliases = {}  periph = env['PLATFORM_SPEC'].get('periph', {})  if 'stm32_dmamux' in periph: -    headers.append('stm32_dmamux.h') +    headers.add('stm32_dmamux.h')      for name, data in periph['stm32_dmamux'].items():          instances.append({              'type': 'STM32_DMAMUX_t<STM32_DMAMUX_reg_%s_t>' % data['type'],              'name': name,              'args': [data['offset']],          }) +  if 'stm32_dma' in periph: -    headers.append('stm32_dma.h') +    headers.add('stm32_dma.h')      for name, data in periph['stm32_dma'].items():          instances.append({              'type': 'STM32_DMA_t<STM32_DMA_reg_%s_t>' % data['type'],              'name': name,              'args': [data['offset']],          }) -env.Jinja2('dma.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases) +if 'litex_wishbone_dma_reader' in periph: +    headers.add('litex_dma.h') +    for name, data in periph['litex_wishbone_dma_reader'].items(): +        instances.append({ +            'type': 'LiteX_Wishbone_DMA_Reader_t', +            'name': name, +            'args': [data['offset']], +        }) + +if 'litex_wishbone_dma_writer' in periph: +    headers.add('litex_dma.h') +    for name, data in periph['litex_wishbone_dma_writer'].items(): +        instances.append({ +            'type': 'LiteX_Wishbone_DMA_Writer_t', +            'name': name, +            'args': [data['offset']], +        }) + +env.Jinja2('dma.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases)  Return('sources')
\ No newline at end of file diff --git a/dma/litex_dma.h b/dma/litex_dma.h new file mode 100644 index 0000000..142c12c --- /dev/null +++ b/dma/litex_dma.h @@ -0,0 +1,24 @@ +#pragma once + +#include <stdint.h> +#include <mmio/mmio.h> + +struct LiteX_Wishbone_DMA_reg_t { +	volatile uint32_t BASEH; +	volatile uint32_t BASEL; +	volatile uint32_t LENGTH; +	volatile uint32_t ENABLE; +	volatile uint32_t DONE; +	volatile uint32_t LOOP; +	volatile uint32_t OFFSET; +}; + +class LiteX_Wishbone_DMA_Reader_t : public mmio_ptr<LiteX_Wishbone_DMA_reg_t> { +	public: +		using mmio_ptr<LiteX_Wishbone_DMA_reg_t>::ptr; +}; + +class LiteX_Wishbone_DMA_Writer_t : public mmio_ptr<LiteX_Wishbone_DMA_reg_t> { +	public: +		using mmio_ptr<LiteX_Wishbone_DMA_reg_t>::ptr; +}; | 
