diff options
| author | Vegard Storheil Eriksen <zyp@jvnv.net> | 2019-04-03 17:14:01 +0200 |
|---|---|---|
| committer | Vegard Storheil Eriksen <zyp@jvnv.net> | 2019-04-03 17:14:01 +0200 |
| commit | 3c526f3d0b30e200462290651f7c6a5eb30710a2 (patch) | |
| tree | 4fe3cb5fc237d5ce7cd761a1c8a5640d88f6d21a /gpio | |
| parent | d81982edb1c4abf9a38da742f81bb648ce6882c5 (diff) | |
Added STM32WB support.stm32wb
Diffstat (limited to 'gpio')
| -rw-r--r-- | gpio/gpio.h | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/gpio/gpio.h b/gpio/gpio.h index d764194..392b2f7 100644 --- a/gpio/gpio.h +++ b/gpio/gpio.h @@ -12,7 +12,7 @@ struct GPIO_reg_t { volatile uint32_t BSRR; volatile uint32_t BRR; volatile uint32_t LCKR; - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) || defined(STM32WB) volatile uint32_t MODER; volatile uint32_t OTYPER; volatile uint32_t OSPEEDR; @@ -45,7 +45,7 @@ class GPIO_t { Output = 0x3, AF = 0xb, Analog = 0x0, - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) || defined(STM32WB) Input, Output, AF, @@ -78,7 +78,7 @@ class GPIO_t { } else { g.reg.CRH = (g.reg.CRH & ~(0xf << (n * 4 - 32))) | m << (n * 4 - 32); } - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) || defined(STM32WB) g.reg.MODER = (g.reg.MODER & ~(3 << (n * 2))) | m << (n * 2); #endif } @@ -86,7 +86,7 @@ class GPIO_t { void set_type(Type t) { #if defined(STM32F1) // TODO: Unified configure() method? - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) || defined(STM32WB) if(t) { g.reg.OTYPER |= 1 << n; } else { @@ -98,13 +98,13 @@ class GPIO_t { void set_pull(Pull p) { #if defined(STM32F1) // TODO: Unified configure() method? - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) || defined(STM32WB) g.reg.PUPDR = (g.reg.PUPDR & ~(3 << (n * 2))) | p << (n * 2); #endif } void set_af(int af) { - #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) || defined(STM32WB) if(n < 8) { g.reg.AFRL = (g.reg.AFRL & ~(0xf << (n * 4))) | af << (n * 4); } else { @@ -114,7 +114,7 @@ class GPIO_t { } void set_speed(Speed s) { - #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) || defined(STM32WB) g.reg.OSPEEDR = (g.reg.OSPEEDR & ~(3 << (n * 2))) | s << (n * 2); #endif } @@ -161,7 +161,7 @@ class GPIO_t { public: constexpr PinArray(const GPIO_t& gpio, int first, int last) : g(gpio), f(first), l(last) {} - #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) || defined(STM32WB) void set_mode(Pin::Mode m) { g.reg.MODER = (g.reg.MODER & ~mask2()) | ((0x55555555 * m) & mask2()); } @@ -228,6 +228,13 @@ static GPIO_t GPIOB(0x50000400); static GPIO_t GPIOC(0x50000800); static GPIO_t GPIOD(0x50000c00); static GPIO_t GPIOH(0x50001c00); +#elif defined(STM32WB) +static GPIO_t GPIOA(0x48000000); +static GPIO_t GPIOB(0x48000400); +static GPIO_t GPIOC(0x48000800); +static GPIO_t GPIOD(0x48000c00); +static GPIO_t GPIOE(0x48001000); +static GPIO_t GPIOH(0x48001c00); #endif #endif |