diff options
author | Vegard Storheil Eriksen <zyp@jvnv.net> | 2022-09-10 17:10:09 +0200 |
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committer | Vegard Storheil Eriksen <zyp@jvnv.net> | 2022-09-10 17:10:09 +0200 |
commit | 2d75a9be32e2510ff32d331c33178c4625a53054 (patch) | |
tree | 52375aa3a1be6468184733ab4ea50d232001d9c7 /interrupt | |
parent | 59b94427c591e7ec4603b2d9dd6753b1b0927175 (diff) |
riscv: Add critical section.
Diffstat (limited to 'interrupt')
-rw-r--r-- | interrupt/critical_section.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/interrupt/critical_section.h b/interrupt/critical_section.h new file mode 100644 index 0000000..aec03a5 --- /dev/null +++ b/interrupt/critical_section.h @@ -0,0 +1,37 @@ +#pragma once + +#include <cstdint> + +#ifdef CORTEX_M +struct critical_section { + uint32_t primask; + + critical_section() { + asm volatile("mrs %0, primask" : "=r" (primask)); + + asm volatile("cpsid i"); + + asm volatile("dmb"); + } + + ~critical_section() { + asm volatile("dmb"); + + asm volatile("msr primask, %0" :: "r" (primask)); + } +}; +#endif + +#ifdef RISCV +struct critical_section { + uint32_t mie; + + critical_section() { + asm volatile("csrrw %0, mie, x0" : "=r" (mie)); + } + + ~critical_section() { + asm volatile("csrw mie, %0" :: "r" (mie)); + } +}; +#endif |