diff options
| author | Vegard Storheil Eriksen <zyp@jvnv.net> | 2015-03-29 21:37:03 +0200 |
|---|---|---|
| committer | Vegard Storheil Eriksen <zyp@jvnv.net> | 2016-08-18 23:36:07 +0200 |
| commit | 7b2d322df819e8a339cdb534e69d8e205765d3b2 (patch) | |
| tree | c18a85a712285d6f3939113824eb2f2636833992 /interrupt | |
| parent | 29d8f1b4e89f31e2f3b448c4d40c6c2518629686 (diff) | |
Added STM32L0 support.
Diffstat (limited to 'interrupt')
| -rw-r--r-- | interrupt/fault.cpp | 4 | ||||
| -rw-r--r-- | interrupt/interrupt.cpp | 4 |
2 files changed, 7 insertions, 1 deletions
diff --git a/interrupt/fault.cpp b/interrupt/fault.cpp index 016b74b..0a0410b 100644 --- a/interrupt/fault.cpp +++ b/interrupt/fault.cpp @@ -3,6 +3,8 @@ #include <os/time.h> inline void __attribute__((naked)) switch_context() { + #if ! defined(STM32L0) // TODO: cortex-m0/+ unsupported for now. + asm volatile ("cpsid i"); // Save unsaved registers. @@ -21,6 +23,8 @@ inline void __attribute__((naked)) switch_context() { // Load registers and return. asm volatile ("pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}" ::: "memory"); + + #endif } template<> diff --git a/interrupt/interrupt.cpp b/interrupt/interrupt.cpp index 611b09c..ebda829 100644 --- a/interrupt/interrupt.cpp +++ b/interrupt/interrupt.cpp @@ -89,8 +89,10 @@ template<> void interrupt<Interrupt::DMA2_Channel4_5>() __attribute__ ((weak, al typedef void (*vector_t)(); +extern uint32_t _ram_end; + vector_t vectors[] __attribute__((section(".vectors"))) = { - (vector_t)0x20004ffc, + (vector_t)&_ram_end, entry, interrupt<Interrupt::NMI>, interrupt<Interrupt::HardFault>, |