diff options
author | Vegard Storheil Eriksen <zyp@jvnv.net> | 2023-05-01 00:49:15 +0200 |
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committer | Vegard Storheil Eriksen <zyp@jvnv.net> | 2023-05-01 00:49:15 +0200 |
commit | 3eb114c680a63274948700c653dfc263d182171a (patch) | |
tree | 1fb25bbb18d0ec85bc4722d032c92495bbfe2f3d /rcc | |
parent | 666cb1b85259cfbea52e1f4fc69eb1640f2764c2 (diff) |
stm32g0b1: Add initial support.
Diffstat (limited to 'rcc')
-rw-r--r-- | rcc/rcc_reg.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/rcc/rcc_reg.h b/rcc/rcc_reg.h index 1223362..630a403 100644 --- a/rcc/rcc_reg.h +++ b/rcc/rcc_reg.h @@ -175,6 +175,33 @@ struct RCC_reg_l4_t { volatile uint32_t CCIPR2; }; +struct RCC_reg_g0_t { + volatile uint32_t CR; + volatile uint32_t ICSCR; + volatile uint32_t CFGR; + volatile uint32_t PLLCFGR; + uint32_t _1; // reserved 0x10 + volatile uint32_t CRRCR; + volatile uint32_t CIER; + volatile uint32_t CIFR; + volatile uint32_t CICR; + volatile uint32_t IOPRSTR; + volatile uint32_t AHBRSTR; + volatile uint32_t APB1RSTR; + volatile uint32_t APB2RSTR; + volatile uint32_t IOPENR; + volatile uint32_t AHBENR; + volatile uint32_t APB1ENR; + volatile uint32_t APB2ENR; + volatile uint32_t IOPSMENR; + volatile uint32_t AHBSMENR; + volatile uint32_t APB1SMENR; + volatile uint32_t APB2SMENR; + volatile uint32_t CCIPR1; + volatile uint32_t CCIPR2; + volatile uint32_t BDCR; + volatile uint32_t CSR; +}; struct RCC_reg_wb_t { volatile uint32_t CR; |