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authorKarl Palsson <karlp@etactica.com>2021-09-17 13:14:21 +0200
committerVegard Storheil Eriksen <zyp@jvnv.net>2022-01-26 23:40:29 +0100
commit3d4618b786594af253a2cf972452e79ae230eccc (patch)
tree36aaf3553161d4f199c25d90eaa6d964eca85039 /usb/dwc_otg_def.h
parentd205055dacbb11ee6e7ff6984b69e79cde564686 (diff)
rcc: stm32wb: add remaining regs and max speed helper
Max speed on WB is 32MHz HSE to 64MHz PLL. Must ensure that CPU2 doesn't exceed 32MHz though. Adds the remaining RCC registers and bits as well. Most of these are not useful, as you can't really/meaningfully deliver software to CPU2, but some of them are used/required by the ST provided WPAN middleware. Signed-off-by: Karl Palsson <karlp@etactica.com> Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Diffstat (limited to 'usb/dwc_otg_def.h')
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