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-rw-r--r--adc/adc.h4
-rw-r--r--platforms/stm32/f7.yaml86
-rw-r--r--rcc/flash.cpp2
-rw-r--r--rcc/rcc.cpp2
-rw-r--r--rcc/rcc_reg.h3
5 files changed, 93 insertions, 4 deletions
diff --git a/adc/adc.h b/adc/adc.h
index 2c2fccb..01a2293 100644
--- a/adc/adc.h
+++ b/adc/adc.h
@@ -32,6 +32,10 @@ static ADC_t& ADC2 = *(ADC_t*)0x40012800;
static ADC_t& ADC3 = *(ADC_t*)0x40013c00;
#elif defined(STM32F4)
+#elif defined(STM32F7)
+static ADC_t& ADC1 = *(ADC_t*)0x40012000;
+static ADC_t& ADC2 = *(ADC_t*)0x40012100;
+static ADC_t& ADC3 = *(ADC_t*)0x40012200;
#endif
#endif
diff --git a/platforms/stm32/f7.yaml b/platforms/stm32/f7.yaml
index 39aa4bd..82f6520 100644
--- a/platforms/stm32/f7.yaml
+++ b/platforms/stm32/f7.yaml
@@ -18,6 +18,53 @@
size: 320k
periph:
+ stm32_flash:
+ FLASH:
+ type: f4
+ offset: 0x40023c00
+
+ stm32_gpio:
+ GPIOA:
+ offset: 0x40020000
+ GPIOB:
+ offset: 0x40020400
+ GPIOC:
+ offset: 0x40020800
+ GPIOD:
+ offset: 0x40020c00
+ GPIOE:
+ offset: 0x40021000
+ GPIOF:
+ offset: 0x40021400
+ GPIOG:
+ offset: 0x40021800
+ GPIOH:
+ offset: 0x40021c00
+ GPIOI:
+ offset: 0x40022000
+ GPIOJ:
+ offset: 0x40022400
+ GPIOK:
+ offset: 0x40022800
+
+ stm32_timer:
+ TIM1:
+ offset: 0x40010000
+ TIM2:
+ offset: 0x40000000
+ TIM3:
+ offset: 0x40000400
+ TIM4:
+ offset: 0x40000800
+ TIM5:
+ offset: 0x40000c00
+ TIM6:
+ offset: 0x40001000
+ TIM7:
+ offset: 0x40001400
+ TIM8:
+ offset: 0x40010400
+
stm32_uart:
USART1:
offset: 0x40011000
@@ -25,6 +72,24 @@
USART2:
offset: 0x40004400
type: v2
+ USART3:
+ offset: 0x40004800
+ type: v2
+ UART4:
+ offset: 0x40004c00
+ type: v2
+ UART5:
+ offset: 0x40005000
+ type: v2
+ USART6:
+ offset: 0x40011400
+ type: v2
+ UART7:
+ offset: 0x40007800
+ type: v2
+ UART8:
+ offset: 0x40007c00
+ type: v2
stm32_i2c:
I2C1:
@@ -40,10 +105,24 @@
offset: 0x40006000
type: v2
+ stm32_dma:
+ DMA1:
+ type: v2
+ offset: 0x40026000
+ DMA2:
+ type: v2
+ offset: 0x40026400
+
stm32_ltdc:
LTDC:
offset: 0x40016800
+ dwc_otg:
+ OTG_FS:
+ offset: 0x50000000
+ OTG_HS:
+ offset: 0x40040000
+
rcc:
RCC:
offset: 0x40023800
@@ -59,8 +138,8 @@
GPIOG: 6
GPIOH: 7
GPIOI: 8
- GPIOJ: 8
- GPIOK: 8
+ GPIOJ: 9
+ GPIOK: 10
CRC: 12
BKPSRAM: 18
DTCMRAM: 20
@@ -238,5 +317,8 @@
96: I2C4_ER
97: SPDIFRX
+ define:
+ - STM32F7
+
meta:
cpu: cortex-m7f \ No newline at end of file
diff --git a/rcc/flash.cpp b/rcc/flash.cpp
index 988764f..e1bdfd3 100644
--- a/rcc/flash.cpp
+++ b/rcc/flash.cpp
@@ -9,7 +9,7 @@ void flash_init() {
// Set flash latency.
FLASH->ACR = 0x12;
- #elif defined(STM32F4)
+ #elif defined(STM32F4) || defined(STM32F7)
// Set flash latency.
FLASH->ACR = 0x107;
diff --git a/rcc/rcc.cpp b/rcc/rcc.cpp
index 67bb948..ed42082 100644
--- a/rcc/rcc.cpp
+++ b/rcc/rcc.cpp
@@ -118,7 +118,7 @@ void rcc_init() {
#endif
}
-#if defined(STM32F4)
+#if defined(STM32F4) || defined(STM32F7)
void rcc_init(uint32_t osc_mhz, uint32_t sysclk_mhz) {
// Initialize flash.
flash_init();
diff --git a/rcc/rcc_reg.h b/rcc/rcc_reg.h
index 2612580..d5f8b68 100644
--- a/rcc/rcc_reg.h
+++ b/rcc/rcc_reg.h
@@ -85,6 +85,9 @@ struct RCC_reg_f4_t {
volatile uint32_t _2;
volatile uint32_t SSCGR;
volatile uint32_t PLLI2SCFGR;
+ volatile uint32_t PLLSAICFGR;
+ volatile uint32_t DCKCFGR1;
+ volatile uint32_t DCKCFGR2;
};
struct RCC_reg_l0_t {