diff options
-rw-r--r-- | .gitignore | 1 | ||||
-rw-r--r-- | SConscript | 1 | ||||
-rw-r--r-- | platforms/stm32/wb.yaml | 5 | ||||
-rw-r--r-- | pwr/SConscript | 22 | ||||
-rw-r--r-- | pwr/stm32_pwr.h | 41 |
5 files changed, 70 insertions, 0 deletions
@@ -12,6 +12,7 @@ interrupt/interrupt.h interrupt/interrupt_enums.h interrupt/default_handlers.cpp interrupt/vectors_*.cpp +pwr/pwr.h rcc/flash.h rcc/rcc.h rcc/rcc_enums.h @@ -10,6 +10,7 @@ env.Append( env.SConscript('dma/SConscript'), env.SConscript('gpio/SConscript'), env.SConscript('interrupt/SConscript'), + env.SConscript('pwr/SConscript'), env.SConscript('rcc/SConscript'), env.SConscript('timer/SConscript'), env.SConscript('uart/SConscript'), diff --git a/platforms/stm32/wb.yaml b/platforms/stm32/wb.yaml index 251e369..bd506c4 100644 --- a/platforms/stm32/wb.yaml +++ b/platforms/stm32/wb.yaml @@ -58,6 +58,11 @@ GPIOE: offset: 0x48001000 + stm32_pwr: + PWR: + type: wb + offset: 0x58000400 + stm32_timer: TIM1: offset: 0x40012C00 diff --git a/pwr/SConscript b/pwr/SConscript new file mode 100644 index 0000000..d728602 --- /dev/null +++ b/pwr/SConscript @@ -0,0 +1,22 @@ +Import('env') + +headers = [] +instances = [] +sources = [] +aliases = {} + +periph = env['PLATFORM_SPEC'].get('periph', {}) + +if 'stm32_pwr' in periph: + headers.append('stm32_pwr.h') + for name, data in periph['stm32_pwr'].items(): + instances.append({ + 'type': 'STM32_PWR_t<STM32_PWR_reg_%s_t>' % data['type'], + 'name': name, + 'args': [data['offset']], + }) + +env.Jinja2('pwr.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases) + +Return('sources') + diff --git a/pwr/stm32_pwr.h b/pwr/stm32_pwr.h new file mode 100644 index 0000000..d85b027 --- /dev/null +++ b/pwr/stm32_pwr.h @@ -0,0 +1,41 @@ +#pragma once + +#include <mmio/mmio.h> + +struct STM32_PWR_reg_wb_t { + volatile uint32_t CR1; + volatile uint32_t CR2; + volatile uint32_t CR3; + volatile uint32_t CR4; + volatile uint32_t SR1; + volatile uint32_t SR2; + volatile uint32_t SCR; + volatile uint32_t CR5; + volatile uint32_t PUCRA; + volatile uint32_t PDCRA; + volatile uint32_t PUCRB; + volatile uint32_t PDCRB; + volatile uint32_t PUCRC; + volatile uint32_t PDCRC; + volatile uint32_t PUCRD; + volatile uint32_t PDCRD; + volatile uint32_t PUCRE; + volatile uint32_t PDCRE; + volatile uint32_t _reserved1[4]; + volatile uint32_t PUCRH; + volatile uint32_t PDCRH; + volatile uint32_t _reserved2[8]; + volatile uint32_t C2CR1; + volatile uint32_t C2CR3; + volatile uint32_t EXTSCR; +}; + + +template <typename T> +class STM32_PWR_t : public mmio_ptr<T> { + public: + using mmio_ptr<T>::ptr; +}; + +// TODO - methods for pullup/pulldowns? + |