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-rw-r--r--rcc/flash.cpp7
-rw-r--r--rcc/flash.h24
2 files changed, 31 insertions, 0 deletions
diff --git a/rcc/flash.cpp b/rcc/flash.cpp
index 0f46cf0..e17b6a1 100644
--- a/rcc/flash.cpp
+++ b/rcc/flash.cpp
@@ -1,5 +1,8 @@
#include "flash.h"
+/**
+ * Configure the flash for maximum speed access.
+ */
void flash_init() {
#if defined(STM32F1) || defined(STM32F3)
@@ -18,5 +21,9 @@ void flash_init() {
// SET flash latency.
FLASH.ACR = 1 << 0;
+ #elif defined(STM32WB)
+ // Prefetch and both caches, plus 3WS for 64MHz
+ FLASH.ACR = 0x700 | 3;
+
#endif
}
diff --git a/rcc/flash.h b/rcc/flash.h
index 789c090..f848b0f 100644
--- a/rcc/flash.h
+++ b/rcc/flash.h
@@ -31,6 +31,28 @@ struct FLASH_t {
volatile uint32_t SR;
volatile uint32_t OPTR;
volatile uint32_t WRPROT;
+ #elif defined(STM32WB)
+ volatile uint32_t ACR;
+ volatile uint32_t KEYR;
+ volatile uint32_t OPTKEYR;
+ volatile uint32_t SR;
+ volatile uint32_t CR;
+ volatile uint32_t ECCR;
+ volatile uint32_t OPTR;
+ volatile uint32_t PCROP1ASR;
+ volatile uint32_t PCROP1AER;
+ volatile uint32_t WRP1AR;
+ volatile uint32_t WRP1BR;
+ volatile uint32_t PCROP1BSR;
+ volatile uint32_t PCROP1BER;
+ volatile uint32_t IPCCBR;
+ volatile uint32_t _reserved1[8];
+ volatile uint32_t C2ACR;
+ volatile uint32_t C2SR;
+ volatile uint32_t C2CR; // 0x64
+ volatile uint32_t _reserved2[7];
+ volatile uint32_t SFR; // 0x80
+ volatile uint32_t SRRVR;
#endif
};
@@ -40,6 +62,8 @@ static FLASH_t& FLASH = *(FLASH_t*)0x40022000;
static FLASH_t& FLASH = *(FLASH_t*)0x40023c00;
#elif defined(STM32L0)
static FLASH_t& FLASH = *(FLASH_t*)0x40022000;
+#elif defined(STM32WB)
+static FLASH_t& FLASH = *(FLASH_t*)0x58004000;
#endif
void flash_init();