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path: root/rcc/rcc.cpp
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2022-04-16stm32f7: Add more peripherals.Vegard Storheil Eriksen1-1/+1
2022-01-26rcc: stm32wb: add remaining regs and max speed helperKarl Palsson1-1/+25
Max speed on WB is 32MHz HSE to 64MHz PLL. Must ensure that CPU2 doesn't exceed 32MHz though. Adds the remaining RCC registers and bits as well. Most of these are not useful, as you can't really/meaningfully deliver software to CPU2, but some of them are used/required by the ST provided WPAN middleware. Signed-off-by: Karl Palsson <karlp@etactica.com> Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2022-01-20adc: stm32f3: expand and verifyKarl Palsson1-3/+7
Working with dma and timers. This preserves the somewhat dubious decision that ADC clock for F1 and F3 should be 12Mhz. It can always be overridden later.
2022-01-20platforms: stm32f3: make functionalKarl Palsson1-5/+5
Sufficient for blinking leds. Not much else tested yet. Signed-off-by: Karl Palsson <karlp@etactica.com>
2021-01-26rcc: Generate enables from platform spec.Vegard Storheil Eriksen1-44/+44
2019-03-19Added STM32F042 support.Vegard Storheil Eriksen1-0/+10
2017-05-14STM32F4: Added rcc_init() overload with sysclk argument.Vegard Storheil Eriksen1-0/+39
2016-08-18Add STM32L0 to rcc_init().Vegard Storheil Eriksen1-0/+30
2012-12-29Fixed F1 RCC bug.Vegard Storheil Eriksen1-1/+1
2012-11-19Added support for F3.Vegard Storheil Eriksen1-1/+1
2012-08-07Initial import.Vegard Storheil Eriksen1-0/+51
Most sources are split off from suzumebachi project revision 2fc77d2 as is with some path changes. New build rules introduced.