Age | Commit message (Collapse) | Author | Files | Lines |
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FIXME: LPTIM should be split out, rcc should squish to earlier, as early
as we can with other rcc fixes,post the last dev_v2 merge.
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Some people might like to turn peripherals back off again. We have all
the machinery in place, so make it easy for them.
Signed-off-by: Karl Palsson <karlp@etactica.com>
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Max speed on WB is 32MHz HSE to 64MHz PLL. Must ensure that CPU2
doesn't exceed 32MHz though.
Adds the remaining RCC registers and bits as well. Most of these are not
useful, as you can't really/meaningfully deliver software to CPU2, but
some of them are used/required by the ST provided WPAN middleware.
Signed-off-by: Karl Palsson <karlp@etactica.com>
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
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Basic RCC and memory map support.
Signed-off-by: Karl Palsson <karlp@etactica.com>
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