From 17e2631f49b799121c1dcfdf3e89e8d6a4928a42 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Wed, 15 Sep 2021 14:18:54 +0000 Subject: cortex_m: debug: basic ITM/DWT/TPIU stubs. Sourced from zyp on irc. Maybe not the best or most permanent name, but saves dropping it into every project. Signed-off-by: Karl Palsson --- cortex_m/debug.h | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 cortex_m/debug.h diff --git a/cortex_m/debug.h b/cortex_m/debug.h new file mode 100644 index 0000000..c1b63f6 --- /dev/null +++ b/cortex_m/debug.h @@ -0,0 +1,41 @@ +#pragma once + +#include + +#include + +struct ITM_reg_t { + volatile uint32_t STIM[256]; + uint32_t _reserved[640]; + volatile uint32_t TER[8]; + uint32_t _reserved2[8]; + volatile uint32_t TPR; + uint32_t _reserved3[15]; + volatile uint32_t TCR; + uint32_t _reserved4[76]; + volatile uint32_t LSR; +}; + +struct DWT_reg_t { + volatile uint32_t CTRL; + volatile uint32_t CYCCNT; + volatile uint32_t CPICNT; + volatile uint32_t EXCCNT; + volatile uint32_t SLEEPCNT; + volatile uint32_t LSUCNT; + volatile uint32_t FOLDCNT; + volatile uint32_t PCSR; +}; + +struct TPIU_reg_t { + volatile uint32_t SSPSR; + volatile uint32_t CSPSR; + uint32_t _reserved[2]; + volatile uint32_t ACPR; + uint32_t _reserved2[55]; + volatile uint32_t SPPR; +}; + +constexpr mmio_ptr ITM {0xe0000000}; +constexpr mmio_ptr DWT {0xe0001000}; +constexpr mmio_ptr TPIU {0xe0040000}; \ No newline at end of file -- cgit v1.2.3