From 2d75a9be32e2510ff32d331c33178c4625a53054 Mon Sep 17 00:00:00 2001
From: Vegard Storheil Eriksen <zyp@jvnv.net>
Date: Sat, 10 Sep 2022 17:10:09 +0200
Subject: riscv: Add critical section.

---
 async/scheduler.h            |  2 +-
 cortex_m/critical_section.h  | 21 ---------------------
 interrupt/critical_section.h | 37 +++++++++++++++++++++++++++++++++++++
 platforms/cortex-m.yaml      |  3 +++
 platforms/riscv.yaml         |  3 +++
 5 files changed, 44 insertions(+), 22 deletions(-)
 delete mode 100644 cortex_m/critical_section.h
 create mode 100644 interrupt/critical_section.h

diff --git a/async/scheduler.h b/async/scheduler.h
index bae4890..5c2adaa 100644
--- a/async/scheduler.h
+++ b/async/scheduler.h
@@ -3,7 +3,7 @@
 #include <coroutine>
 #include <optional>
 
-#include <cortex_m/critical_section.h>
+#include <interrupt/critical_section.h>
 
 struct schedulable {
     schedulable* next = nullptr;
diff --git a/cortex_m/critical_section.h b/cortex_m/critical_section.h
deleted file mode 100644
index 6b611a8..0000000
--- a/cortex_m/critical_section.h
+++ /dev/null
@@ -1,21 +0,0 @@
-#pragma once
-
-#include <cstdint>
-
-struct critical_section {
-    uint32_t primask;
-
-    critical_section() {
-        asm volatile("mrs %0, primask" : "=r" (primask));
-
-        asm volatile("cpsid i");
-
-        asm volatile("dmb");
-    }
-
-    ~critical_section() {
-        asm volatile("dmb");
-
-        asm volatile("msr primask, %0" :: "r" (primask));
-    }
-};
diff --git a/interrupt/critical_section.h b/interrupt/critical_section.h
new file mode 100644
index 0000000..aec03a5
--- /dev/null
+++ b/interrupt/critical_section.h
@@ -0,0 +1,37 @@
+#pragma once
+
+#include <cstdint>
+
+#ifdef CORTEX_M
+struct critical_section {
+    uint32_t primask;
+
+    critical_section() {
+        asm volatile("mrs %0, primask" : "=r" (primask));
+
+        asm volatile("cpsid i");
+
+        asm volatile("dmb");
+    }
+
+    ~critical_section() {
+        asm volatile("dmb");
+
+        asm volatile("msr primask, %0" :: "r" (primask));
+    }
+};
+#endif
+
+#ifdef RISCV
+struct critical_section {
+    uint32_t mie;
+
+    critical_section() {
+        asm volatile("csrrw %0, mie, x0" : "=r" (mie));
+    }
+
+    ~critical_section() {
+        asm volatile("csrw mie, %0" :: "r" (mie));
+    }
+};
+#endif
diff --git a/platforms/cortex-m.yaml b/platforms/cortex-m.yaml
index ea77615..0a15611 100644
--- a/platforms/cortex-m.yaml
+++ b/platforms/cortex-m.yaml
@@ -21,6 +21,9 @@
   toolchains:
     - arm-none-eabi
 
+  define:
+    - CORTEX_M
+
 # cortex-m3
 - match:
     cpu: !re cortex-m3
diff --git a/platforms/riscv.yaml b/platforms/riscv.yaml
index ec9ecd7..16db64b 100644
--- a/platforms/riscv.yaml
+++ b/platforms/riscv.yaml
@@ -36,3 +36,6 @@
   
   toolchains:
     - riscv64-unknown-elf
+
+  define:
+    - RISCV
-- 
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