From 2d8a1c0489da61996bb4787a53353585d0413a03 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Fri, 17 Sep 2021 14:39:47 +0000 Subject: adc: stm32f3: expand and verify Working with dma and timers. This preserves the somewhat dubious decision that ADC clock for F1 and F3 should be 12Mhz. It can always be overridden later. --- adc/adc_f3.h | 4 +++- rcc/rcc.cpp | 10 +++++++--- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/adc/adc_f3.h b/adc/adc_f3.h index 1f9f98e..194432d 100644 --- a/adc/adc_f3.h +++ b/adc/adc_f3.h @@ -52,9 +52,11 @@ static ADC_t& ADC1 = *(ADC_t*)0x50000000; static ADC_t& ADC2 = *(ADC_t*)0x50000100; static ADC_t& ADC3 = *(ADC_t*)0x50000400; static ADC_t& ADC4 = *(ADC_t*)0x50000500; +static ADC_COMMON_t& ADC_COMMON1 = *(ADC_COMMON_t*)0x50000300; +static ADC_COMMON_t& ADC_COMMON3 = *(ADC_COMMON_t*)0x50000700; #elif defined(STM32WB) static ADC_t& ADC1 = *(ADC_t*)0x50040000; static ADC_COMMON_t& ADC_COMMON = *(ADC_COMMON_t*)0x50040300; #endif -#endif +#endif diff --git a/rcc/rcc.cpp b/rcc/rcc.cpp index 25ed29c..794b1ee 100644 --- a/rcc/rcc.cpp +++ b/rcc/rcc.cpp @@ -23,10 +23,14 @@ void rcc_init() { // Set APB1 prescaler to /2. RCC->CFGR |= 0x400; - - // Set ADCCLK prescaler to /6. + + // Set ADCCLK prescaler to /6. => 12MHz is ~sufficient +#if defined(STM32F1) RCC->CFGR |= 0x8000; - +#else + RCC->CFGR2 = (0b10011 << 9) | (0b10011 << 4); +#endif + #elif defined(STM32F4) // Enable HSE. -- cgit v1.2.3