From 59b94427c591e7ec4603b2d9dd6753b1b0927175 Mon Sep 17 00:00:00 2001 From: Vegard Storheil Eriksen Date: Sat, 10 Sep 2022 17:07:52 +0200 Subject: stm32g4: Add OPAMP. --- adc/SConscript | 9 +++++++++ adc/stm32_opamp.h | 23 +++++++++++++++++++++++ platforms/stm32/g4.yaml | 4 ++++ 3 files changed, 36 insertions(+) create mode 100644 adc/stm32_opamp.h diff --git a/adc/SConscript b/adc/SConscript index e008d25..8bcc25d 100644 --- a/adc/SConscript +++ b/adc/SConscript @@ -25,6 +25,15 @@ if 'stm32_adc_common' in periph: 'args': [data['offset']], }) +if 'stm32_opamp' in periph: + headers.append('stm32_opamp.h') + for name, data in periph['stm32_opamp'].items(): + instances.append({ + 'type': 'STM32_OPAMP_t', + 'name': name, + 'args': [data['offset']], + }) + env.Jinja2('adc.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases, type_aliases = type_aliases) Return('sources') diff --git a/adc/stm32_opamp.h b/adc/stm32_opamp.h new file mode 100644 index 0000000..928bd0c --- /dev/null +++ b/adc/stm32_opamp.h @@ -0,0 +1,23 @@ +#pragma once + +#include + +struct STM32_OPAMP_reg_t { + volatile uint32_t CSR1; + volatile uint32_t CSR2; + volatile uint32_t CSR3; + volatile uint32_t CSR4; + volatile uint32_t CSR5; + volatile uint32_t CSR6; + volatile uint32_t TCMR1; + volatile uint32_t TCMR2; + volatile uint32_t TCMR3; + volatile uint32_t TCMR4; + volatile uint32_t TCMR5; + volatile uint32_t TCMR6; +}; + +class STM32_OPAMP_t : public mmio_ptr { + public: + using mmio_ptr::ptr; +}; diff --git a/platforms/stm32/g4.yaml b/platforms/stm32/g4.yaml index 5a07327..b5059d9 100644 --- a/platforms/stm32/g4.yaml +++ b/platforms/stm32/g4.yaml @@ -57,6 +57,10 @@ type: v2 offset: 0x50000700 + stm32_opamp: + OPAMP: + offset: 0x40010300 + stm32_dma: DMA1: type: v1 -- cgit v1.2.3