From ac17bb052b9056122dbae6867d4c5252c8eafb47 Mon Sep 17 00:00:00 2001 From: Vegard Storheil Eriksen Date: Mon, 19 Nov 2012 19:11:57 +0100 Subject: Added support for F3. --- build_rules | 31 ++++++++++++++++++--- gpio/gpio.h | 9 ++++++- gpio/pin.h | 12 ++++----- ld_scripts/stm32_f303_b.ld | 7 +++++ ld_scripts/stm32_f303_c.ld | 7 +++++ ld_scripts/stm32_f373_8.ld | 6 +++++ ld_scripts/stm32_f373_b.ld | 6 +++++ ld_scripts/stm32_f373_c.ld | 6 +++++ rcc/flash.cpp | 2 +- rcc/flash.h | 4 +-- rcc/rcc.cpp | 2 +- rcc/rcc.h | 67 ++++++++++++++++++++++++++++++++++++++++++++-- usart/usart.h | 2 +- usb/usb.h | 2 +- 14 files changed, 145 insertions(+), 18 deletions(-) create mode 100644 ld_scripts/stm32_f303_b.ld create mode 100644 ld_scripts/stm32_f303_c.ld create mode 100644 ld_scripts/stm32_f373_8.ld create mode 100644 ld_scripts/stm32_f373_b.ld create mode 100644 ld_scripts/stm32_f373_c.ld diff --git a/build_rules b/build_rules index e0f9b59..385fde1 100644 --- a/build_rules +++ b/build_rules @@ -7,6 +7,12 @@ def select_arm(env, family): TOOLCHAIN = 'arm-none-eabi-', ) + if family == 'cortex-m4f': + family = 'cortex-m4' + has_mcu = True + else: + has_mcu = False + env.Replace( CC = '${TOOLCHAIN}gcc', CXX = '${TOOLCHAIN}g++', @@ -28,7 +34,7 @@ def select_arm(env, family): CPU_FAMILY = family, ) - if family == 'cortex-m4': + if has_mcu: env.Append(CCFLAGS = ' -mhard-float') def select_stm32(env, variant): @@ -45,8 +51,27 @@ def select_stm32(env, variant): 'b': 'stm32_f1_b.ld', }[flash] + elif family == 'f303': + select_arm(env, 'cortex-m4f') + env.Append(CPPDEFINES = ['STM32F3']) + + env['LINK_SCRIPT'] = { + 'b': 'stm32_f303_b.ld', + 'c': 'stm32_f303_c.ld', + }[flash] + + elif family == 'f373': + select_arm(env, 'cortex-m4f') + env.Append(CPPDEFINES = ['STM32F3']) + + env['LINK_SCRIPT'] = { + '8': 'stm32_f373_8.ld', + 'b': 'stm32_f373_b.ld', + 'c': 'stm32_f373_c.ld', + }[flash] + elif family in ('f405', 'f407'): - select_arm(env, 'cortex-m4') + select_arm(env, 'cortex-m4f') env.Append(CPPDEFINES = ['STM32F4']) env['LINK_SCRIPT'] = { @@ -55,7 +80,7 @@ def select_stm32(env, variant): }[flash] else: - print 'Unknown stm32 family: %s' % mcu + print 'Unknown stm32 family: %s' % family Exit(1) def SelectMCU(env, mcu, variant_dir = None): diff --git a/gpio/gpio.h b/gpio/gpio.h index 9a693df..b7dd163 100644 --- a/gpio/gpio.h +++ b/gpio/gpio.h @@ -12,7 +12,7 @@ struct GPIO_reg_t { volatile uint32_t BSRR; volatile uint32_t BRR; volatile uint32_t LCKR; - #elif defined(STM32F4) + #elif defined(STM32F3) || defined(STM32F4) volatile uint32_t MODER; volatile uint32_t OTYPER; volatile uint32_t OSPEEDR; @@ -38,6 +38,13 @@ static GPIO_t GPIOA(0x40010800); static GPIO_t GPIOB(0x40010c00); static GPIO_t GPIOC(0x40011000); static GPIO_t GPIOD(0x40011400); +#elif defined(STM32F3) +static GPIO_t GPIOA(0x48000000); +static GPIO_t GPIOB(0x48000400); +static GPIO_t GPIOC(0x48000800); +static GPIO_t GPIOD(0x48000c00); +static GPIO_t GPIOE(0x48001000); +static GPIO_t GPIOF(0x48001400); #elif defined(STM32F4) static GPIO_t GPIOA(0x40020000); static GPIO_t GPIOB(0x40020400); diff --git a/gpio/pin.h b/gpio/pin.h index 485cb33..d8089d3 100644 --- a/gpio/pin.h +++ b/gpio/pin.h @@ -17,7 +17,7 @@ class Pin { Output = 0x3, AF = 0xb, Analog = 0x0, - #elif defined(STM32F4) + #elif defined(STM32F3) || defined(STM32F4) Input, Output, AF, @@ -50,7 +50,7 @@ class Pin { } else { g.reg.CRH = (g.reg.CRH & ~(0xf << (n * 4 - 32))) | m << (n * 4 - 32); } - #elif defined(STM32F4) + #elif defined(STM32F3) || defined(STM32F4) g.reg.MODER = (g.reg.MODER & ~(3 << (n * 2))) | m << (n * 2); #endif } @@ -58,7 +58,7 @@ class Pin { void set_type(Type t) { #if defined(STM32F1) // TODO: Unified configure() method? - #elif defined(STM32F4) + #elif defined(STM32F3) || defined(STM32F4) if(t) { g.reg.OTYPER |= 1 << n; } else { @@ -70,13 +70,13 @@ class Pin { void set_pull(Pull p) { #if defined(STM32F1) // TODO: Unified configure() method? - #elif defined(STM32F4) + #elif defined(STM32F3) || defined(STM32F4) g.reg.PUPDR = (g.reg.PUPDR & ~(3 << (n * 2))) | p << (n * 2); #endif } void set_af(int af) { - #if defined(STM32F4) + #if defined(STM32F3) || defined(STM32F4) if(n < 8) { g.reg.AFRL = (g.reg.AFRL & ~(0xf << (n * 4))) | af << (n * 4); } else { @@ -86,7 +86,7 @@ class Pin { } void set_speed(Speed s) { - #if defined(STM32F4) + #if defined(STM32F3) || defined(STM32F4) g.reg.OSPEEDR = (g.reg.OSPEEDR & ~(3 << (n * 2))) | s << (n * 2); #endif } diff --git a/ld_scripts/stm32_f303_b.ld b/ld_scripts/stm32_f303_b.ld new file mode 100644 index 0000000..a0cb6b1 --- /dev/null +++ b/ld_scripts/stm32_f303_b.ld @@ -0,0 +1,7 @@ +MEMORY { + flash (rx) : org = 0x08000000, len = 128k + ram (rwx) : org = 0x20000000, len = 32k + ccm (rwx) : org = 0x10000000, len = 8k +} + +INCLUDE "arm_flash_ram.ld" diff --git a/ld_scripts/stm32_f303_c.ld b/ld_scripts/stm32_f303_c.ld new file mode 100644 index 0000000..4cc4894 --- /dev/null +++ b/ld_scripts/stm32_f303_c.ld @@ -0,0 +1,7 @@ +MEMORY { + flash (rx) : org = 0x08000000, len = 256k + ram (rwx) : org = 0x20000000, len = 40k + ccm (rwx) : org = 0x10000000, len = 8k +} + +INCLUDE "arm_flash_ram.ld" diff --git a/ld_scripts/stm32_f373_8.ld b/ld_scripts/stm32_f373_8.ld new file mode 100644 index 0000000..929ee6e --- /dev/null +++ b/ld_scripts/stm32_f373_8.ld @@ -0,0 +1,6 @@ +MEMORY { + flash (rx) : org = 0x08000000, len = 64k + ram (rwx) : org = 0x20000000, len = 16k +} + +INCLUDE "arm_flash_ram.ld" diff --git a/ld_scripts/stm32_f373_b.ld b/ld_scripts/stm32_f373_b.ld new file mode 100644 index 0000000..ab6620c --- /dev/null +++ b/ld_scripts/stm32_f373_b.ld @@ -0,0 +1,6 @@ +MEMORY { + flash (rx) : org = 0x08000000, len = 128k + ram (rwx) : org = 0x20000000, len = 24k +} + +INCLUDE "arm_flash_ram.ld" diff --git a/ld_scripts/stm32_f373_c.ld b/ld_scripts/stm32_f373_c.ld new file mode 100644 index 0000000..812a041 --- /dev/null +++ b/ld_scripts/stm32_f373_c.ld @@ -0,0 +1,6 @@ +MEMORY { + flash (rx) : org = 0x08000000, len = 256k + ram (rwx) : org = 0x20000000, len = 32k +} + +INCLUDE "arm_flash_ram.ld" diff --git a/rcc/flash.cpp b/rcc/flash.cpp index 2b0fb69..528ba57 100644 --- a/rcc/flash.cpp +++ b/rcc/flash.cpp @@ -1,7 +1,7 @@ #include "flash.h" void flash_init() { - #if defined(STM32F1) + #if defined(STM32F1) || defined(STM32F3) // Set flash latency. FLASH.ACR = 0x12; diff --git a/rcc/flash.h b/rcc/flash.h index 30d30a5..abb3484 100644 --- a/rcc/flash.h +++ b/rcc/flash.h @@ -9,7 +9,7 @@ struct FLASH_t { volatile uint32_t OPTKEYR; volatile uint32_t SR; volatile uint32_t CR; - #if defined(STM32F1) + #if defined(STM32F1) || defined(STM32F3) volatile uint32_t AR; volatile uint32_t RESERVED; volatile uint32_t OBR; @@ -19,7 +19,7 @@ struct FLASH_t { #endif }; -#if defined(STM32F1) +#if defined(STM32F1) || defined(STM32F3) static FLASH_t& FLASH = *(FLASH_t*)0x40022000; #elif defined(STM32F4) static FLASH_t& FLASH = *(FLASH_t*)0x40023c00; diff --git a/rcc/rcc.cpp b/rcc/rcc.cpp index 57b8f7d..6028cdc 100644 --- a/rcc/rcc.cpp +++ b/rcc/rcc.cpp @@ -5,7 +5,7 @@ void rcc_init() { // Initialize flash. flash_init(); - #if defined(STM32F1) + #if defined(STM32F1) || defined(STM32F3) // Enable HSE. RCC.CR |= 0x10000; diff --git a/rcc/rcc.h b/rcc/rcc.h index 55cd1f8..6307919 100644 --- a/rcc/rcc.h +++ b/rcc/rcc.h @@ -15,6 +15,20 @@ struct RCC_t { volatile uint32_t APB1ENR; volatile uint32_t BDCR; volatile uint32_t CSR; + #elif defined(STM32F3) + volatile uint32_t CR; + volatile uint32_t CFGR; + volatile uint32_t CIR; + volatile uint32_t APB2RSTR; + volatile uint32_t APB1RSTR; + volatile uint32_t AHBENR; + volatile uint32_t APB2ENR; + volatile uint32_t APB1ENR; + volatile uint32_t BDCR; + volatile uint32_t CSR; + volatile uint32_t AHBRSTR; + volatile uint32_t CFGR2; + volatile uint32_t CFGR3; #elif defined(STM32F4) volatile uint32_t CR; volatile uint32_t PLLCFGR; @@ -109,6 +123,55 @@ struct RCC_t { TIM10 = 1 << 20, TIM11 = 1 << 21 }; + #elif defined(STM32F3) + enum AHB_dev { + DMA1 = 1 << 0, + DMA2 = 1 << 1, + SRAM = 1 << 2, + FLITF = 1 << 4, + CRC = 1 << 6, + GPIOA = 1 << 17, + GPIOB = 1 << 18, + GPIOC = 1 << 19, + GPIOD = 1 << 20, + GPIOE = 1 << 21, + GPIOF = 1 << 22, + TSC = 1 << 24, + ADC12 = 1 << 28, + ADC34 = 1 << 29, + }; + + enum APB1_dev { + TIM2 = 1 << 0, + TIM3 = 1 << 1, + TIM4 = 1 << 2, + TIM6 = 1 << 4, + TIM7 = 1 << 5, + WWDG = 1 << 11, + SPI2 = 1 << 14, + SPI3 = 1 << 15, + USART2 = 1 << 17, + USART3 = 1 << 18, + UART4 = 1 << 19, + UART5 = 1 << 20, + I2C1 = 1 << 21, + I2C2 = 1 << 22, + USB = 1 << 23, + CAN = 1 << 25, + PWR = 1 << 28, + DAC = 1 << 29, + }; + + enum APB2_dev { + SYSCFG = 1 << 0, + TIM1 = 1 << 11, + SPI1 = 1 << 12, + TIM8 = 1 << 13, + USART1 = 1 << 14, + TIM15 = 1 << 16, + TIM16 = 1 << 17, + TIM17 = 1 << 18, + }; #elif defined(STM32F4) enum AHB1_dev { GPIOA = 1 << 0, @@ -181,7 +244,7 @@ struct RCC_t { }; #endif - #if defined(STM32F1) + #if defined(STM32F1) || defined(STM32F3) inline void enable(AHB_dev dev) { AHBENR |= dev; } @@ -207,7 +270,7 @@ struct RCC_t { } }; -#if defined(STM32F1) +#if defined(STM32F1) || defined(STM32F3) static RCC_t& RCC = *(RCC_t*)0x40021000; #elif defined(STM32F4) static RCC_t& RCC = *(RCC_t*)0x40023800; diff --git a/usart/usart.h b/usart/usart.h index 38f1879..567ccd1 100644 --- a/usart/usart.h +++ b/usart/usart.h @@ -43,7 +43,7 @@ class USART_t { } }; -#if defined(STM32F1) +#if defined(STM32F1) || defined(STM32F3) static USART_t USART1(0x40013800, 72000000); static USART_t USART2(0x40004400, 36000000); static USART_t USART3(0x40004800, 36000000); diff --git a/usb/usb.h b/usb/usb.h index 6f2ac5e..b6a45f2 100644 --- a/usb/usb.h +++ b/usb/usb.h @@ -1,7 +1,7 @@ #ifndef USB_H #define USB_H -#if defined(STM32F1) +#if defined(STM32F1) || defined(STM32F3) #include "f1_usb.h" static F1_USB_t USB(0x40005c00, 0x40006000); -- cgit v1.2.3