From b34efc66f164816d37d47f52efd591555eefdd5c Mon Sep 17 00:00:00 2001
From: Karl Palsson <karlp@tweak.net.au>
Date: Thu, 6 Jan 2022 23:30:28 +0000
Subject: stm32wb: wpan/ipcc/hsem: initial registers

Not sure if "wpan" is the right directory for them, but they didn't feel
like they warranted their own directory each.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
---
 .gitignore              |  2 ++
 SConscript              |  1 +
 platforms/stm32/wb.yaml |  8 ++++++++
 wpan/SConscript         | 29 +++++++++++++++++++++++++++++
 wpan/stm32_hsem.h       | 26 ++++++++++++++++++++++++++
 wpan/stm32_ipcc.h       | 22 ++++++++++++++++++++++
 6 files changed, 88 insertions(+)
 create mode 100644 wpan/SConscript
 create mode 100644 wpan/stm32_hsem.h
 create mode 100644 wpan/stm32_ipcc.h

diff --git a/.gitignore b/.gitignore
index ca4a626..42cb9aa 100644
--- a/.gitignore
+++ b/.gitignore
@@ -19,3 +19,5 @@ rcc/rcc_enums.h
 timer/timer.h
 usb/usb.h
 uart/uart.h
+wpan/hsem.h
+wpan/ipcc.h
diff --git a/SConscript b/SConscript
index e8d7b94..ab20f19 100644
--- a/SConscript
+++ b/SConscript
@@ -15,6 +15,7 @@ env.Append(
 		env.SConscript('timer/SConscript'),
 		env.SConscript('uart/SConscript'),
 		env.SConscript('usb/SConscript'),
+		env.SConscript('wpan/SConscript'),
 		Glob('startup/*.cpp'),
 		Glob('i2c/*.cpp'),
 		Glob('os/*.cpp'),
diff --git a/platforms/stm32/wb.yaml b/platforms/stm32/wb.yaml
index bd506c4..314b729 100644
--- a/platforms/stm32/wb.yaml
+++ b/platforms/stm32/wb.yaml
@@ -58,6 +58,14 @@
       GPIOE:
         offset: 0x48001000
 
+    stm32_hsem:
+      HSEM:
+        offset: 0x58001400
+
+    stm32_ipcc:
+      IPCC:
+        offset: 0x58000c00
+
     stm32_pwr:
       PWR:
         type: wb
diff --git a/wpan/SConscript b/wpan/SConscript
new file mode 100644
index 0000000..d9e854a
--- /dev/null
+++ b/wpan/SConscript
@@ -0,0 +1,29 @@
+Import('env')
+
+periph = env['PLATFORM_SPEC'].get('periph', {})
+
+headers, instances, sources, aliases = [], [], [], {}
+if 'stm32_hsem' in periph:
+    headers.append('stm32_hsem.h')
+    for name, data in periph['stm32_hsem'].items():
+        real_type = data.get('type', 'v1') # Default
+        instances.append({
+            'type': 'STM32_HSEM_t<STM32_HSEM_reg_%s_t>' % real_type,
+            'name': name,
+            'args': [data['offset']],
+        })
+env.Jinja2('hsem.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases)
+
+headers, instances, sources, aliases = [], [], [], {}
+if 'stm32_ipcc' in periph:
+    headers.append('stm32_ipcc.h')
+    for name, data in periph['stm32_ipcc'].items():
+        real_type = data.get('type', 'v1') # Default
+        instances.append({
+            'type': 'STM32_IPCC_t<STM32_IPCC_reg_%s_t>' % real_type,
+            'name': name,
+            'args': [data['offset']],
+        })
+env.Jinja2('ipcc.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases)
+
+Return('sources')
\ No newline at end of file
diff --git a/wpan/stm32_hsem.h b/wpan/stm32_hsem.h
new file mode 100644
index 0000000..f8d9dd3
--- /dev/null
+++ b/wpan/stm32_hsem.h
@@ -0,0 +1,26 @@
+#pragma once
+
+#include <stdint.h>
+#include <mmio/mmio.h>
+
+struct STM32_HSEM_reg_v1_t {
+	volatile uint32_t R[32];
+	volatile uint32_t RLR[32];
+	volatile uint32_t C1IER;
+	volatile uint32_t C1ICR;
+	volatile uint32_t C1ISR;
+	volatile uint32_t C1MISR;
+	volatile uint32_t C2IER;
+	volatile uint32_t C2ICR;
+	volatile uint32_t C2ISR;
+	volatile uint32_t C2MISR;
+	uint32_t _reserved[8];
+	volatile uint32_t CR;
+	volatile uint32_t KEYR;
+};
+
+template <typename T>
+class STM32_HSEM_t : public mmio_ptr<T> {
+	public:
+		using mmio_ptr<T>::ptr;
+};
\ No newline at end of file
diff --git a/wpan/stm32_ipcc.h b/wpan/stm32_ipcc.h
new file mode 100644
index 0000000..e264d8b
--- /dev/null
+++ b/wpan/stm32_ipcc.h
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <stdint.h>
+#include <mmio/mmio.h>
+
+
+struct STM32_IPCC_reg_v1_t {
+	volatile uint32_t C1CR;
+	volatile uint32_t C1MR;
+	volatile uint32_t C1SCR;
+	volatile uint32_t C1TOC2SR;
+	volatile uint32_t C2CR;
+	volatile uint32_t C2MR;
+	volatile uint32_t C2SCR;
+	volatile uint32_t C2TOC1SR;
+};
+
+template <typename T>
+class STM32_IPCC_t : public mmio_ptr<T> {
+	public:
+		using mmio_ptr<T>::ptr;
+};
-- 
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