From f1475a7e6cb3077781199981bc3ee74e4ba29b86 Mon Sep 17 00:00:00 2001 From: Vegard Storheil Eriksen Date: Sun, 29 Mar 2015 22:05:36 +0200 Subject: Added STM32F0 support. --- build_rules | 10 ++++++- gpio/gpio.h | 29 ++++++++++++------ interrupt/fault.cpp | 2 +- ld_scripts/stm32_f0_8.ld | 6 ++++ rcc/rcc.h | 76 +++++++++++++++++++++++++++++++++++++++++++++--- 5 files changed, 108 insertions(+), 15 deletions(-) create mode 100644 ld_scripts/stm32_f0_8.ld diff --git a/build_rules b/build_rules index 81547eb..d2f15c8 100644 --- a/build_rules +++ b/build_rules @@ -44,7 +44,15 @@ def select_stm32(env, variant): pin_count = variant[9] flash = variant[10] - if family == 'f103': + if family == 'f051': + select_arm(env, 'cortex-m0') + env.Append(CPPDEFINES = ['STM32F0']) + + env['LINK_SCRIPT'] = { + '8': 'stm32_f0_8.ld', + }[flash] + + elif family == 'f103': select_arm(env, 'cortex-m3') env.Append(CPPDEFINES = ['STM32F1']) diff --git a/gpio/gpio.h b/gpio/gpio.h index d764194..ceef3ed 100644 --- a/gpio/gpio.h +++ b/gpio/gpio.h @@ -12,7 +12,7 @@ struct GPIO_reg_t { volatile uint32_t BSRR; volatile uint32_t BRR; volatile uint32_t LCKR; - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #else volatile uint32_t MODER; volatile uint32_t OTYPER; volatile uint32_t OSPEEDR; @@ -45,7 +45,7 @@ class GPIO_t { Output = 0x3, AF = 0xb, Analog = 0x0, - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #else Input, Output, AF, @@ -78,7 +78,7 @@ class GPIO_t { } else { g.reg.CRH = (g.reg.CRH & ~(0xf << (n * 4 - 32))) | m << (n * 4 - 32); } - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #else g.reg.MODER = (g.reg.MODER & ~(3 << (n * 2))) | m << (n * 2); #endif } @@ -86,7 +86,7 @@ class GPIO_t { void set_type(Type t) { #if defined(STM32F1) // TODO: Unified configure() method? - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #else if(t) { g.reg.OTYPER |= 1 << n; } else { @@ -98,13 +98,15 @@ class GPIO_t { void set_pull(Pull p) { #if defined(STM32F1) // TODO: Unified configure() method? - #elif defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #else g.reg.PUPDR = (g.reg.PUPDR & ~(3 << (n * 2))) | p << (n * 2); #endif } void set_af(int af) { - #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #if defined(STM32F1) + // TODO: Unified configure() method? + #else if(n < 8) { g.reg.AFRL = (g.reg.AFRL & ~(0xf << (n * 4))) | af << (n * 4); } else { @@ -114,7 +116,9 @@ class GPIO_t { } void set_speed(Speed s) { - #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #if defined(STM32F1) + // TODO: Unified configure() method? + #else g.reg.OSPEEDR = (g.reg.OSPEEDR & ~(3 << (n * 2))) | s << (n * 2); #endif } @@ -161,7 +165,7 @@ class GPIO_t { public: constexpr PinArray(const GPIO_t& gpio, int first, int last) : g(gpio), f(first), l(last) {} - #if defined(STM32F3) || defined(STM32F4) || defined(STM32L0) + #if ! defined(STM32F1) void set_mode(Pin::Mode m) { g.reg.MODER = (g.reg.MODER & ~mask2()) | ((0x55555555 * m) & mask2()); } @@ -199,7 +203,14 @@ class GPIO_t { typedef GPIO_t::Pin Pin; typedef GPIO_t::PinArray PinArray; -#if defined(STM32F1) +#if defined(STM32F0) +static GPIO_t GPIOA(0x48000000); +static GPIO_t GPIOB(0x48000400); +static GPIO_t GPIOC(0x48000800); +static GPIO_t GPIOD(0x48000c00); +static GPIO_t GPIOE(0x48001000); +static GPIO_t GPIOF(0x48001400); +#elif defined(STM32F1) static GPIO_t GPIOA(0x40010800); static GPIO_t GPIOB(0x40010c00); static GPIO_t GPIOC(0x40011000); diff --git a/interrupt/fault.cpp b/interrupt/fault.cpp index 0a0410b..0d91c1d 100644 --- a/interrupt/fault.cpp +++ b/interrupt/fault.cpp @@ -3,7 +3,7 @@ #include inline void __attribute__((naked)) switch_context() { - #if ! defined(STM32L0) // TODO: cortex-m0/+ unsupported for now. + #if ! (defined(STM32F0) || defined(STM32L0)) // TODO: cortex-m0/+ unsupported for now. asm volatile ("cpsid i"); diff --git a/ld_scripts/stm32_f0_8.ld b/ld_scripts/stm32_f0_8.ld new file mode 100644 index 0000000..289255c --- /dev/null +++ b/ld_scripts/stm32_f0_8.ld @@ -0,0 +1,6 @@ +MEMORY { + flash (rx) : org = 0x08000000, len = 64k + ram (rwx) : org = 0x20000000, len = 8k +} + +INCLUDE "arm_flash_ram.ld" diff --git a/rcc/rcc.h b/rcc/rcc.h index fec5aa1..a4616f5 100644 --- a/rcc/rcc.h +++ b/rcc/rcc.h @@ -4,7 +4,22 @@ #include struct RCC_t { - #if defined(STM32F1) + #if defined(STM32F0) + volatile uint32_t CR; + volatile uint32_t CFGR; + volatile uint32_t CIR; + volatile uint32_t APB2RSTR; + volatile uint32_t APB1RSTR; + volatile uint32_t AHBENR; + volatile uint32_t APB2ENR; + volatile uint32_t APB1ENR; + volatile uint32_t BDCR; + volatile uint32_t CSR; + volatile uint32_t AHBRSTR; + volatile uint32_t CFGR2; + volatile uint32_t CFGR3; + volatile uint32_t CR2; + #elif defined(STM32F1) volatile uint32_t CR; volatile uint32_t CFGR; volatile uint32_t CIR; @@ -88,7 +103,60 @@ struct RCC_t { volatile uint32_t CSR; #endif - #if defined(STM32F1) + #if defined(STM32F0) + enum AHB_dev { + DMA1 = 1 << 0, + DMA2 = 1 << 1, + SRAM = 1 << 2, + FLITF = 1 << 4, + CRC = 1 << 6, + GPIOA = 1 << 17, + GPIOB = 1 << 18, + GPIOC = 1 << 19, + GPIOD = 1 << 20, + GPIOE = 1 << 21, + GPIOF = 1 << 22, + TSC = 1 << 24, + }; + + enum APB1_dev { + TIM2 = 1 << 0, + TIM3 = 1 << 1, + TIM6 = 1 << 4, + TIM7 = 1 << 5, + TIM14 = 1 << 8, + WWDG = 1 << 11, + SPI2 = 1 << 14, + USART2 = 1 << 17, + USART3 = 1 << 18, + USART4 = 1 << 19, + USART5 = 1 << 20, + I2C1 = 1 << 21, + I2C2 = 1 << 22, + USB = 1 << 23, + CAN = 1 << 25, + CRS = 1 << 27, + PWR = 1 << 28, + DAC = 1 << 29, + CEC = 1 << 30, + }; + + enum APB2_dev { + SYSCFG = 1 << 0, + USART6 = 1 << 5, + USART7 = 1 << 6, + USART8 = 1 << 7, + ADC = 1 << 9, + TIM1 = 1 << 11, + SPI1 = 1 << 12, + USART1 = 1 << 14, + TIM15 = 1 << 16, + TIM16 = 1 << 17, + TIM17 = 1 << 18, + DBGMCU = 1 << 22, + }; + + #elif defined(STM32F1) enum AHB_dev { DMA1 = 1 << 0, DMA2 = 1 << 1, @@ -313,7 +381,7 @@ struct RCC_t { }; #endif - #if defined(STM32F1) || defined(STM32F3) || defined(STM32L0) + #if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32L0) inline void enable(AHB_dev dev) { AHBENR |= dev; } @@ -344,7 +412,7 @@ struct RCC_t { #endif }; -#if defined(STM32F1) || defined(STM32F3) || defined(STM32L0) +#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32L0) static RCC_t& RCC = *(RCC_t*)0x40021000; #elif defined(STM32F4) static RCC_t& RCC = *(RCC_t*)0x40023800; -- cgit v1.2.3