From 968937d0d937487ab301f017c145889fc0e94692 Mon Sep 17 00:00:00 2001
From: Vegard Storheil Eriksen <zyp@jvnv.net>
Date: Wed, 15 Sep 2021 23:16:11 +0200
Subject: platforms: Add initial RISC-V/GD32V support.

---
 interrupt/SConscript | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

(limited to 'interrupt/SConscript')

diff --git a/interrupt/SConscript b/interrupt/SConscript
index 2380815..4544785 100644
--- a/interrupt/SConscript
+++ b/interrupt/SConscript
@@ -30,6 +30,22 @@ if 'nvic' in periph:
         env.Jinja2('vectors_nvic.cpp', 'vectors_nvic.cpp.j2', interrupts = interrupts),
     ])
 
+if 'clic' in periph:
+    headers.append('clic.h')
+    for name, data in periph['clic'].items():
+        instances.append({
+            'type': 'CLIC_t',
+            'name': name,
+            'args': [data['offset']],
+        })
+
+    aliases['interrupt_ctl'] = 'CLIC'
+
+    sources.extend([
+        File('dispatch_clic.cpp'),
+        env.Jinja2('vectors_clic.cpp', 'vectors_clic.cpp.j2', interrupts = interrupts),
+    ])
+
 env.Jinja2('interrupt.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases)
 
 Return('sources')
-- 
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