From e586c178073b9a0fee90d5fc8e795d266ebd7b7d Mon Sep 17 00:00:00 2001
From: Vegard Storheil Eriksen <zyp@jvnv.net>
Date: Tue, 7 Aug 2012 16:50:46 +0200
Subject: Initial import.

Most sources are split off from suzumebachi project revision 2fc77d2 as is with some path changes. New build rules introduced.
---
 ld_scripts/arm_flash_ram.ld | 78 +++++++++++++++++++++++++++++++++++++++++++++
 ld_scripts/stm32_f1_8.ld    |  6 ++++
 ld_scripts/stm32_f1_b.ld    |  6 ++++
 ld_scripts/stm32_f4_e.ld    |  7 ++++
 ld_scripts/stm32_f4_g.ld    |  7 ++++
 5 files changed, 104 insertions(+)
 create mode 100644 ld_scripts/arm_flash_ram.ld
 create mode 100644 ld_scripts/stm32_f1_8.ld
 create mode 100644 ld_scripts/stm32_f1_b.ld
 create mode 100644 ld_scripts/stm32_f4_e.ld
 create mode 100644 ld_scripts/stm32_f4_g.ld

(limited to 'ld_scripts')

diff --git a/ld_scripts/arm_flash_ram.ld b/ld_scripts/arm_flash_ram.ld
new file mode 100644
index 0000000..4839b16
--- /dev/null
+++ b/ld_scripts/arm_flash_ram.ld
@@ -0,0 +1,78 @@
+_ram_start = ORIGIN(ram);
+_ram_size = LENGTH(ram);
+_ram_end = _ram_start + _ram_size;
+
+SECTIONS {
+	. = 0;
+	
+	.vectors : ALIGN(16) SUBALIGN(16) {
+		KEEP(*(.vectors))
+	} > flash
+	
+	.init_array : ALIGN(4) SUBALIGN(4) {
+		PROVIDE(_init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE(_init_array_end = .);
+	} > flash
+	
+	.fini_array : ALIGN(4) SUBALIGN(4) {
+		PROVIDE(_fini_array_start = .);
+		KEEP(*(.fini_array))
+		KEEP(*(SORT(.fini_array.*)))
+		PROVIDE(_fini_array_end = .);
+	} > flash
+	
+	.text : ALIGN(16) SUBALIGN(16) {
+		*(.text.startup.*)
+		*(.text)
+		*(.text.*)
+		*(.rodata)
+		*(.rodata.*)
+		*(.glue_7t)
+		*(.glue_7)
+		*(.gcc*)
+	} > flash
+	
+	.ARM.extab : {
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > flash
+	
+	.ARM.exidx : {
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > flash
+	
+	.eh_frame_hdr : {
+		*(.eh_frame_hdr)
+	} > flash
+	
+	.eh_frame : ONLY_IF_RO {
+		*(.eh_frame)
+	} > flash
+	
+	. = ALIGN(4);
+	
+	PROVIDE(_data_rom = .);
+	
+	.data : {
+		PROVIDE(_data_start = .);
+		*(.data)
+		. = ALIGN(4);
+		*(.data.*)
+		. = ALIGN(4);
+		*(.ramtext)
+		. = ALIGN(4);
+		PROVIDE(_data_end = .);
+	} > ram AT > flash
+	
+	.bss : {
+		PROVIDE(_bss_start = .);
+		*(.bss)
+		. = ALIGN(4);
+		*(.bss.*)
+		. = ALIGN(4);
+		*(COMMON)
+		. = ALIGN(4);
+		PROVIDE(_bss_end = .);
+	} > ram    
+}
diff --git a/ld_scripts/stm32_f1_8.ld b/ld_scripts/stm32_f1_8.ld
new file mode 100644
index 0000000..7fd5e59
--- /dev/null
+++ b/ld_scripts/stm32_f1_8.ld
@@ -0,0 +1,6 @@
+MEMORY {
+	flash (rx) : org = 0x08000000, len = 128k
+	ram (rwx)  : org = 0x20000000, len = 20k
+}
+
+INCLUDE "arm_flash_ram.ld"
diff --git a/ld_scripts/stm32_f1_b.ld b/ld_scripts/stm32_f1_b.ld
new file mode 100644
index 0000000..ea0b341
--- /dev/null
+++ b/ld_scripts/stm32_f1_b.ld
@@ -0,0 +1,6 @@
+MEMORY {
+	flash (rx) : org = 0x08000000, len = 256k
+	ram (rwx)  : org = 0x20000000, len = 20k
+}
+
+INCLUDE "arm_flash_ram.ld"
diff --git a/ld_scripts/stm32_f4_e.ld b/ld_scripts/stm32_f4_e.ld
new file mode 100644
index 0000000..b19753c
--- /dev/null
+++ b/ld_scripts/stm32_f4_e.ld
@@ -0,0 +1,7 @@
+MEMORY {
+	flash (rx) : org = 0x08000000, len = 512k
+	ram (rwx)  : org = 0x20000000, len = 128k
+	ccm (rwx)  : org = 0x10000000, len = 64k
+}
+
+INCLUDE "arm_flash_ram.ld"
diff --git a/ld_scripts/stm32_f4_g.ld b/ld_scripts/stm32_f4_g.ld
new file mode 100644
index 0000000..6ce322b
--- /dev/null
+++ b/ld_scripts/stm32_f4_g.ld
@@ -0,0 +1,7 @@
+MEMORY {
+	flash (rx) : org = 0x08000000, len = 1024k
+	ram (rwx)  : org = 0x20000000, len = 128k
+	ccm (rwx)  : org = 0x10000000, len = 64k
+}
+
+INCLUDE "arm_flash_ram.ld"
-- 
cgit v1.2.3