From 24507af1a99f66ded76e8796de5bae35c7c0b567 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Mon, 20 Sep 2021 11:23:29 +0000 Subject: stm32_rcc: allow aliases for enables. By flipping the name/number definition, we can define aliases such as ADC and ADC1, or FMC/FSMC for the same bits, making it easier to have code that both matches reference manuals, and also code that matches between lines. runtime tested on WB, compile tested on F3. Signed-off-by: Karl Palsson --- platforms/stm32/f7.yaml | 156 ++++++++++++++++++++++++------------------------ 1 file changed, 78 insertions(+), 78 deletions(-) (limited to 'platforms/stm32/f7.yaml') diff --git a/platforms/stm32/f7.yaml b/platforms/stm32/f7.yaml index 7c8e04d..abf821a 100644 --- a/platforms/stm32/f7.yaml +++ b/platforms/stm32/f7.yaml @@ -32,92 +32,92 @@ type: f4 bus: AHB1: - 0: GPIOA - 1: GPIOB - 2: GPIOC - 3: GPIOD - 4: GPIOE - 5: GPIOF - 6: GPIOG - 7: GPIOH - 8: GPIOI - 8: GPIOJ - 8: GPIOK - 12: CRC - 18: BKPSRAM - 20: DTCMRAM - 21: DMA1 - 22: DMA2 - 23: DMA2D - 25: ETHMAC - 26: ETHMACTX - 27: ETHMACRX - 28: ETHMACPTP - 29: OTGHS - 30: OTGHSULPI + GPIOA: 0 + GPIOB: 1 + GPIOC: 2 + GPIOD: 3 + GPIOE: 4 + GPIOF: 5 + GPIOG: 6 + GPIOH: 7 + GPIOI: 8 + GPIOJ: 8 + GPIOK: 8 + CRC: 12 + BKPSRAM: 18 + DTCMRAM: 20 + DMA1: 21 + DMA2: 22 + DMA2D: 23 + ETHMAC: 25 + ETHMACTX: 26 + ETHMACRX: 27 + ETHMACPTP: 28 + OTGHS: 29 + OTGHSULPI: 30 AHB2: - 0: DCMI - 4: CRYP - 5: HASH - 6: RNG - 7: OTGFS + DCMI: 0 + CRYP: 4 + HASH: 5 + RNG: 6 + OTGFS: 7 AHB3: - 0: FMC - 1: QSPI + FMC: 0 + QSPI: 1 APB1: - 0: TIM2 - 1: TIM3 - 2: TIM4 - 3: TIM5 - 4: TIM6 - 5: TIM7 - 6: TIM12 - 7: TIM13 - 8: TIM14 - 9: LPTIM1 - 11: WWDG - 14: SPI2 - 15: SPI3 - 16: SPDIFRX - 17: USART2 - 18: USART3 - 19: UART4 - 20: UART5 - 21: I2C1 - 22: I2C2 - 23: I2C3 - 24: I2C4 - 25: CAN1 - 26: CAN2 - 27: CEC - 28: PWR - 29: DAC - 30: UART7 - 31: UART8 + TIM2: 0 + TIM3: 1 + TIM4: 2 + TIM5: 3 + TIM6: 4 + TIM7: 5 + TIM12: 6 + TIM13: 7 + TIM14: 8 + LPTIM1: 9 + WWDG: 11 + SPI2: 14 + SPI3: 15 + SPDIFRX: 16 + USART2: 17 + USART3: 18 + UART4: 19 + UART5: 20 + I2C1: 21 + I2C2: 22 + I2C3: 23 + I2C4: 24 + CAN1: 25 + CAN2: 26 + CEC: 27 + PWR: 28 + DAC: 29 + UART7: 30 + UART8: 31 APB2: - 0: TIM1 - 1: TIM8 - 4: USART1 - 5: USART6 - 8: ADC1 - 9: ADC2 - 10: ADC3 - 11: SDMMC1 - 12: SPI1 - 13: SPI4 - 14: SYSCFG - 16: TIM9 - 17: TIM10 - 18: TIM11 - 20: SPI5 - 21: SPI6 - 22: SAI1 - 23: SAI2 - 26: LTDC + TIM1: 0 + TIM8: 1 + USART1: 4 + USART6: 5 + ADC1: 8 + ADC2: 9 + ADC3: 10 + SDMMC1: 11 + SPI1: 12 + SPI4: 13 + SYSCFG: 14 + TIM9: 16 + TIM10: 17 + TIM11: 18 + SPI5: 20 + SPI6: 21 + SAI1: 22 + SAI2: 23 + LTDC: 26 interrupt: irq: -- cgit v1.2.3