From 2d8a1c0489da61996bb4787a53353585d0413a03 Mon Sep 17 00:00:00 2001
From: Karl Palsson <karlp@etactica.com>
Date: Fri, 17 Sep 2021 14:39:47 +0000
Subject: adc: stm32f3: expand and verify

Working with dma and timers.  This preserves the somewhat dubious
decision that ADC clock for F1 and F3 should be 12Mhz.  It can always be
overridden later.
---
 rcc/rcc.cpp | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

(limited to 'rcc/rcc.cpp')

diff --git a/rcc/rcc.cpp b/rcc/rcc.cpp
index 25ed29c..794b1ee 100644
--- a/rcc/rcc.cpp
+++ b/rcc/rcc.cpp
@@ -23,10 +23,14 @@ void rcc_init() {
 	
 	// Set APB1 prescaler to /2.
 	RCC->CFGR |= 0x400;
-	
-	// Set ADCCLK prescaler to /6.
+
+	// Set ADCCLK prescaler to /6. => 12MHz is ~sufficient
+#if defined(STM32F1)
 	RCC->CFGR |= 0x8000;
-	
+#else
+	RCC->CFGR2 = (0b10011 << 9) | (0b10011 << 4);
+#endif
+
 	#elif defined(STM32F4)
 	
 	// Enable HSE.
-- 
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