From 1155f57710a068efbdc7fdd167ac4e44dd54ec7f Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Wed, 12 Jan 2022 17:30:15 +0000 Subject: stm32wb: rtc: initial registers Backup registers are just hardcoded to 32, which is the max seen. Note that the STM32WB only has 20! I've captured that in the platform yaml, even though it's not used anywhere (yet?) Signed-off-by: Karl Palsson --- rtc/SConscript | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 rtc/SConscript (limited to 'rtc/SConscript') diff --git a/rtc/SConscript b/rtc/SConscript new file mode 100644 index 0000000..f7956c0 --- /dev/null +++ b/rtc/SConscript @@ -0,0 +1,24 @@ +Import('env') + +headers = [] +instances = [] +sources = [] +aliases = {} + +periph = env['PLATFORM_SPEC'].get('periph', {}) + +if 'stm32_rtc' in periph: + headers.append('stm32_rtc.h') + for name, data in periph['stm32_rtc'].items(): + # Default to version 2, with subseconds, the most common form. + real_type = data.get('type', 'v2ss') + instances.append({ + 'type': 'STM32_RTC_t' % real_type, + 'name': name, + 'args': [data['offset']], + }) + +env.Jinja2('rtc.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases) + +Return('sources') + -- cgit v1.2.3