1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
# This is incomplete, just preserving register addresses! - periph: stm32_timer: TIM1: type: v1 offset: 0x40012c00 TIM2: type: v1 offset: 0x40000000 TIM3: type: v1 offset: 0x40000400 TIM4: type: v1 offset: 0x40000800 TIM5: type: v1 offset: 0x40000c00 TIM6: type: v1 offset: 0x40001000 TIM7: type: v1 offset: 0x40001400 TIM8: type: v1 offset: 0x40013400