summaryrefslogtreecommitdiff
path: root/rcc/stm32_flash.h
blob: dddb1cf5ec99c149f7452fc7592230e0e4e73eb1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
#pragma once

#include <stdint.h>
#include <mmio/mmio.h>

// Also f0 and f3
struct STM32_FLASH_reg_f1_t {
	volatile uint32_t ACR;
	volatile uint32_t KEYR;
	volatile uint32_t OPTKEYR;
	volatile uint32_t SR;
	volatile uint32_t CR;
	volatile uint32_t AR;
	volatile uint32_t RESERVED;
	volatile uint32_t OBR;
	volatile uint32_t WRPR;
};

struct STM32_FLASH_reg_f4_t {
	volatile uint32_t ACR;
	volatile uint32_t KEYR;
	volatile uint32_t OPTKEYR;
	volatile uint32_t SR;
	volatile uint32_t CR;
	volatile uint32_t OPTCR;
};

struct STM32_FLASH_reg_l0_t {
	volatile uint32_t ACR;
	volatile uint32_t PECR;
	volatile uint32_t PDKEYR;
	volatile uint32_t PEKEYR;
	volatile uint32_t PRGKEYR;
	volatile uint32_t OPTKEYR;
	volatile uint32_t SR;
	volatile uint32_t OPTR;
	volatile uint32_t WRPROT;
};

struct STM32_FLASH_reg_l4_t {
	volatile uint32_t ACR;
	volatile uint32_t PDKEYR;
	volatile uint32_t KEYR;
	volatile uint32_t OPTKEYR;
	volatile uint32_t SR;
	volatile uint32_t CR;
	volatile uint32_t ECCR;
	volatile uint32_t OPTR;
	volatile uint32_t PCROP1SR;
	volatile uint32_t PCROP1ER;
	volatile uint32_t WRP1AR;
	volatile uint32_t WRP1BR;
};

struct STM32_FLASH_reg_g4_t {
	volatile uint32_t ACR;
	volatile uint32_t PDKEYR;
	volatile uint32_t KEYR;
	volatile uint32_t OPTKEYR;
	volatile uint32_t SR;
	volatile uint32_t CR;
	volatile uint32_t ECCR;
	volatile uint32_t OPTR;
	volatile uint32_t PCROP1SR;
	volatile uint32_t PCROP1ER;
	volatile uint32_t WRP1AR;
	volatile uint32_t WRP1BR;
	uint32_t _reserved1[4];
	volatile uint32_t PCROP2SR;
	volatile uint32_t PCROP2ER;
	volatile uint32_t WRP2AR;
	volatile uint32_t WRP2BR;
	uint32_t _reserved2[7];
	volatile uint32_t SEC1R;
	volatile uint32_t SEC2R;
};

struct STM32_FLASH_reg_wb_t {
	volatile uint32_t ACR;
	volatile uint32_t KEYR;
	volatile uint32_t OPTKEYR;
	volatile uint32_t SR;
	volatile uint32_t CR;
	volatile uint32_t ECCR;
	volatile uint32_t OPTR;
	volatile uint32_t PCROP1ASR;
	volatile uint32_t PCROP1AER;
	volatile uint32_t WRP1AR;
	volatile uint32_t WRP1BR;
	volatile uint32_t PCROP1BSR;
	volatile uint32_t PCROP1BER;
	volatile uint32_t IPCCBR;
	volatile uint32_t _reserved1[8];
	volatile uint32_t C2ACR;
	volatile uint32_t C2SR;
	volatile uint32_t C2CR; // 0x64
	volatile uint32_t _reserved2[7];
	volatile uint32_t SFR; // 0x80
	volatile uint32_t SRRVR;
};

template <typename T>
class STM32_FLASH_t : public mmio_ptr<T> {
    public:
        using mmio_ptr<T>::ptr;
};