From 6b9259b3d611d66e8c99ffa33d01a0396f1624b6 Mon Sep 17 00:00:00 2001 From: Vegard Storheil Eriksen Date: Thu, 10 Nov 2011 19:52:51 +0100 Subject: Added DMA and ADC register structures. --- stm32.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/stm32.h b/stm32.h index 7f7e7a0..8144e80 100644 --- a/stm32.h +++ b/stm32.h @@ -215,4 +215,48 @@ static TIM_t& TIM6 = *(TIM_t*)0x40001000; static TIM_t& TIM7 = *(TIM_t*)0x40001400; static TIM_t& TIM8 = *(TIM_t*)0x40013400; +struct ADC_t { + volatile uint32_t SR; + volatile uint32_t CR1; + volatile uint32_t CR2; + volatile uint32_t SMPR1; + volatile uint32_t SMPR2; + volatile uint32_t JOFR1; + volatile uint32_t JOFR2; + volatile uint32_t JOFR3; + volatile uint32_t JOFR4; + volatile uint32_t HTR; + volatile uint32_t LTR; + volatile uint32_t SQR1; + volatile uint32_t SQR2; + volatile uint32_t SQR3; + volatile uint32_t JSQR; + volatile uint32_t JDR1; + volatile uint32_t JDR2; + volatile uint32_t JDR3; + volatile uint32_t JDR4; + volatile uint32_t DR; +}; + +static ADC_t& ADC1 = *(ADC_t*)0x40012400; +static ADC_t& ADC2 = *(ADC_t*)0x40012800; +static ADC_t& ADC3 = *(ADC_t*)0x40013c00; + +struct DMA_t { + struct CH_t { + volatile uint32_t CCR; + volatile uint32_t CNDTR; + volatile uint32_t CPAR; + volatile uint32_t CMAR; + uint32_t _reserved; + }; + + volatile uint32_t ISR; + volatile uint32_t IFCR; + CH_t CH[7]; +}; + +static DMA_t& DMA1 = *(DMA_t*)0x40020000; +static DMA_t& DMA2 = *(DMA_t*)0x40020400; + #endif -- cgit v1.2.3