#ifndef STM32_H #define STM32_H #include struct RCC_t { volatile uint32_t CR; volatile uint32_t CFGR; volatile uint32_t CIR; volatile uint32_t APB2RSTR; volatile uint32_t APB1RSTR; volatile uint32_t AHBENR; volatile uint32_t APB2ENR; volatile uint32_t APB1ENR; volatile uint32_t BDCR; volatile uint32_t CSR; }; static RCC_t& RCC = *(RCC_t*)0x40021000; struct FLASH_t { volatile uint32_t ACR; volatile uint32_t KEYR; volatile uint32_t OPTKEYR; volatile uint32_t SR; volatile uint32_t CR; volatile uint32_t AR; volatile uint32_t RESERVED; volatile uint32_t OBR; volatile uint32_t WRPR; }; static FLASH_t& FLASH = *(FLASH_t*)0x40022000; struct GPIO_t { volatile uint32_t CRL; volatile uint32_t CRH; volatile uint32_t IDR; volatile uint32_t ODR; volatile uint32_t BSRR; volatile uint32_t BRR; volatile uint32_t LCKR; }; static GPIO_t& GPIOA = *(GPIO_t*)0x40010800; static GPIO_t& GPIOB = *(GPIO_t*)0x40010c00; static GPIO_t& GPIOC = *(GPIO_t*)0x40011000; struct I2C_t { volatile uint32_t CR1; volatile uint32_t CR2; volatile uint32_t OAR1; volatile uint32_t OAR2; volatile uint32_t DR; volatile uint32_t SR1; volatile uint32_t SR2; volatile uint32_t CCR; volatile uint32_t TRISE; }; static I2C_t& I2C1 = *(I2C_t*)0x40005400; static I2C_t& I2C2 = *(I2C_t*)0x40005800; #endif