diff options
author | Vegard Storheil Eriksen <zyp@jvnv.net> | 2011-12-03 20:18:53 +0100 |
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committer | Vegard Storheil Eriksen <zyp@jvnv.net> | 2011-12-03 20:18:53 +0100 |
commit | d0a7ee402141d6703218765c36a47003538168d1 (patch) | |
tree | 4943107590772281dc78937e096c280d23147ecd | |
parent | 229fd5405eef950e60cae3b6f446c146f38a2e13 (diff) |
Moved USART register definitions into seperate header and added abstraction layer.
-rw-r--r-- | drivers/gps.cpp | 4 | ||||
-rw-r--r-- | drivers/gps.h | 6 | ||||
-rw-r--r-- | hal/stm32.h | 20 | ||||
-rw-r--r-- | hal/usart.cpp | 2 | ||||
-rw-r--r-- | hal/usart.h | 60 |
5 files changed, 58 insertions, 34 deletions
diff --git a/drivers/gps.cpp b/drivers/gps.cpp index 1ae3684..cdbb7ad 100644 --- a/drivers/gps.cpp +++ b/drivers/gps.cpp @@ -9,7 +9,7 @@ void interrupt<Interrupt::USART3>() { void GPS::irq() { - uint8_t c = USART3.DR; + uint8_t c = USART3.recv(); if(!incomplete_msg) { incomplete_msg = msg_pool.create(); @@ -31,7 +31,7 @@ void GPS::irq() { incomplete_msg->buf[incomplete_msg->n++] = c; if(c == '\n') { - GPIOB.ODR ^= 1 << 1; + //GPIOB.ODR ^= 1 << 1; const_cast<P<GPSMsg>&>(complete_msg) = incomplete_msg; incomplete_msg.reset(); diff --git a/drivers/gps.h b/drivers/gps.h index 786b719..16a971b 100644 --- a/drivers/gps.h +++ b/drivers/gps.h @@ -2,7 +2,7 @@ #define GPS_H #include "rcc.h" -#include "stm32.h" +#include "usart.h" #include "interrupt.h" #include "thread.h" @@ -37,8 +37,8 @@ class GPS { void enable() { RCC.enable(RCC.USART3); - USART3.BRR = 7500; // 4800 baud - USART3.CR1 = 0x202c; + USART3.set_baudrate(4800); + USART3.enable(); Interrupt::enable(Interrupt::USART3); } diff --git a/hal/stm32.h b/hal/stm32.h index 41ebbb7..7ddb479 100644 --- a/hal/stm32.h +++ b/hal/stm32.h @@ -57,26 +57,6 @@ struct I2C_t { static I2C_t& I2C1 = *(I2C_t*)0x40005400; static I2C_t& I2C2 = *(I2C_t*)0x40005800; -struct USART_t { - volatile uint32_t SR; - volatile uint32_t DR; - volatile uint32_t BRR; - volatile uint32_t CR1; - volatile uint32_t CR2; - volatile uint32_t CR3; - volatile uint32_t GTPR; -}; - -#if defined(STM32F1) -static USART_t& USART1 = *(USART_t*)0x40013800; -static USART_t& USART2 = *(USART_t*)0x40004400; -static USART_t& USART3 = *(USART_t*)0x40004800; -#elif defined(STM32F4) -static USART_t& USART1 = *(USART_t*)0x40011000; -static USART_t& USART2 = *(USART_t*)0x40004400; -static USART_t& USART3 = *(USART_t*)0x40004800; -#endif - struct TIM_t { volatile uint32_t CR1; volatile uint32_t CR2; diff --git a/hal/usart.cpp b/hal/usart.cpp index c446302..61fe393 100644 --- a/hal/usart.cpp +++ b/hal/usart.cpp @@ -2,6 +2,6 @@ template<> void interrupt<Interrupt::USART1>() { - USART1.DR; + USART1.recv(); //GPIOB.ODR ^= 1 << 1; } diff --git a/hal/usart.h b/hal/usart.h index 78a28dc..24618fd 100644 --- a/hal/usart.h +++ b/hal/usart.h @@ -6,20 +6,64 @@ #include "interrupt.h" #include "thread.h" +struct USART_reg_t { + volatile uint32_t SR; + volatile uint32_t DR; + volatile uint32_t BRR; + volatile uint32_t CR1; + volatile uint32_t CR2; + volatile uint32_t CR3; + volatile uint32_t GTPR; +}; + +class USART_t { + public: + USART_reg_t& reg; + const uint32_t clk; + + USART_t(uint32_t reg_addr, uint32_t bus_clk) : reg(*(USART_reg_t*)reg_addr), clk(bus_clk) {} + + inline void set_baudrate(uint32_t baudrate) { + reg.BRR = clk / baudrate; + } + + inline void enable() { + reg.CR1 = 0x202c; + } + + inline void send(uint8_t data) { + while(!(reg.SR & 0x80)) { + Thread::yield(); + } // Wait for TXE. + + reg.DR = data; + } + + inline uint8_t recv() { + return reg.DR; + } +}; + +#if defined(STM32F1) +static USART_t USART1(0x40013800, 72000000); +static USART_t USART2(0x40004400, 36000000); +static USART_t USART3(0x40004800, 36000000); +#elif defined(STM32F4) +static USART_t USART1(0x40011000, 84000000); +static USART_t USART2(0x40004400, 42000000); +static USART_t USART3(0x40004800, 42000000); +#endif + inline void usart_enable() { RCC.enable(RCC.USART1); - USART1.BRR = 625; // 115200 baud - USART1.CR1 = 0x202c; + USART1.set_baudrate(115200); + USART1.enable(); - Interrupt::enable(Interrupt::USART1); + //Interrupt::enable(Interrupt::USART1); } inline void usart_send(uint8_t data) { - while(!(USART1.SR & 0x80)) { - Thread::yield(); - } // Wait for TXE. - - USART1.DR = data; + USART1.send(data); } #endif |