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authorVegard Storheil Eriksen <zyp@jvnv.net>2012-10-14 00:16:05 +0200
committerVegard Storheil Eriksen <zyp@jvnv.net>2012-10-14 00:16:05 +0200
commitc22df1415784186110bbf253e3fe2e231a55c9c3 (patch)
treee80d0557721aff5b564f35409d73a895586c75c3
parent94f53e8caf81e0fbc556dea226d8479963e304a8 (diff)
Add wrapper class around GPIO register class.
-rw-r--r--gpio/gpio.h37
-rw-r--r--gpio/pin.h28
2 files changed, 37 insertions, 28 deletions
diff --git a/gpio/gpio.h b/gpio/gpio.h
index 725d4df..9a693df 100644
--- a/gpio/gpio.h
+++ b/gpio/gpio.h
@@ -1,7 +1,9 @@
#ifndef GPIO_H
#define GPIO_H
-struct GPIO_t {
+#include <stdint.h>
+
+struct GPIO_reg_t {
#if defined(STM32F1)
volatile uint32_t CRL;
volatile uint32_t CRH;
@@ -24,21 +26,28 @@ struct GPIO_t {
#endif
};
+class GPIO_t {
+ public:
+ GPIO_reg_t& reg;
+
+ constexpr GPIO_t(uint32_t reg_addr) : reg(*(GPIO_reg_t*)reg_addr) {}
+};
+
#if defined(STM32F1)
-static GPIO_t& GPIOA = *(GPIO_t*)0x40010800;
-static GPIO_t& GPIOB = *(GPIO_t*)0x40010c00;
-static GPIO_t& GPIOC = *(GPIO_t*)0x40011000;
-static GPIO_t& GPIOD = *(GPIO_t*)0x40011400;
+static GPIO_t GPIOA(0x40010800);
+static GPIO_t GPIOB(0x40010c00);
+static GPIO_t GPIOC(0x40011000);
+static GPIO_t GPIOD(0x40011400);
#elif defined(STM32F4)
-static GPIO_t& GPIOA = *(GPIO_t*)0x40020000;
-static GPIO_t& GPIOB = *(GPIO_t*)0x40020400;
-static GPIO_t& GPIOC = *(GPIO_t*)0x40020800;
-static GPIO_t& GPIOD = *(GPIO_t*)0x40020c00;
-static GPIO_t& GPIOE = *(GPIO_t*)0x40021000;
-static GPIO_t& GPIOF = *(GPIO_t*)0x40021400;
-static GPIO_t& GPIOG = *(GPIO_t*)0x40021800;
-static GPIO_t& GPIOH = *(GPIO_t*)0x40021c00;
-static GPIO_t& GPIOI = *(GPIO_t*)0x40022000;
+static GPIO_t GPIOA(0x40020000);
+static GPIO_t GPIOB(0x40020400);
+static GPIO_t GPIOC(0x40020800);
+static GPIO_t GPIOD(0x40020c00);
+static GPIO_t GPIOE(0x40021000);
+static GPIO_t GPIOF(0x40021400);
+static GPIO_t GPIOG(0x40021800);
+static GPIO_t GPIOH(0x40021c00);
+static GPIO_t GPIOI(0x40022000);
#endif
#endif
diff --git a/gpio/pin.h b/gpio/pin.h
index c85de7f..485cb33 100644
--- a/gpio/pin.h
+++ b/gpio/pin.h
@@ -9,7 +9,7 @@ class Pin {
int n;
public:
- Pin(GPIO_t& gpio, int pin) : g(gpio), n(pin) {}
+ constexpr Pin(GPIO_t& gpio, int pin) : g(gpio), n(pin) {}
enum Mode {
#if defined(STM32F1)
@@ -46,12 +46,12 @@ class Pin {
void set_mode(Mode m) {
#if defined(STM32F1)
if(n < 8) {
- g.CRL = (g.CRL & ~(0xf << (n * 4))) | m << (n * 4);
+ g.reg.CRL = (g.reg.CRL & ~(0xf << (n * 4))) | m << (n * 4);
} else {
- g.CRH = (g.CRH & ~(0xf << (n * 4 - 32))) | m << (n * 4 - 32);
+ g.reg.CRH = (g.reg.CRH & ~(0xf << (n * 4 - 32))) | m << (n * 4 - 32);
}
#elif defined(STM32F4)
- g.MODER = (g.MODER & ~(3 << (n * 2))) | m << (n * 2);
+ g.reg.MODER = (g.reg.MODER & ~(3 << (n * 2))) | m << (n * 2);
#endif
}
@@ -60,9 +60,9 @@ class Pin {
// TODO: Unified configure() method?
#elif defined(STM32F4)
if(t) {
- g.OTYPER |= 1 << n;
+ g.reg.OTYPER |= 1 << n;
} else {
- g.OTYPER &= ~(1 << n);
+ g.reg.OTYPER &= ~(1 << n);
}
#endif
}
@@ -71,32 +71,32 @@ class Pin {
#if defined(STM32F1)
// TODO: Unified configure() method?
#elif defined(STM32F4)
- g.PUPDR = (g.PUPDR & ~(3 << (n * 2))) | p << (n * 2);
+ g.reg.PUPDR = (g.reg.PUPDR & ~(3 << (n * 2))) | p << (n * 2);
#endif
}
void set_af(int af) {
#if defined(STM32F4)
if(n < 8) {
- g.AFRL = (g.AFRL & ~(0xf << (n * 4))) | af << (n * 4);
+ g.reg.AFRL = (g.reg.AFRL & ~(0xf << (n * 4))) | af << (n * 4);
} else {
- g.AFRH = (g.AFRH & ~(0xf << (n * 4 - 32))) | af << (n * 4 - 32);
+ g.reg.AFRH = (g.reg.AFRH & ~(0xf << (n * 4 - 32))) | af << (n * 4 - 32);
}
#endif
}
void set_speed(Speed s) {
#if defined(STM32F4)
- g.OSPEEDR = (g.OSPEEDR & ~(3 << (n * 2))) | s << (n * 2);
+ g.reg.OSPEEDR = (g.reg.OSPEEDR & ~(3 << (n * 2))) | s << (n * 2);
#endif
}
void on() {
- g.BSRR = 1 << n;
+ g.reg.BSRR = 1 << n;
}
void off() {
- g.BSRR = 1 << 16 << n;
+ g.reg.BSRR = 1 << 16 << n;
}
void set(bool value) {
@@ -108,11 +108,11 @@ class Pin {
}
bool get() {
- return g.IDR & (1 << n);
+ return g.reg.IDR & (1 << n);
}
void toggle() {
- set(!(g.ODR & (1 << n)));
+ set(!(g.reg.ODR & (1 << n)));
}
};