diff options
author | Karl Palsson <karlp@tweak.net.au> | 2022-01-07 00:33:46 +0100 |
---|---|---|
committer | Vegard Storheil Eriksen <zyp@jvnv.net> | 2022-01-26 23:40:29 +0100 |
commit | 446eb86b3c51095a9e13f0d7a633bcc819b156cc (patch) | |
tree | 762ed849c683d208dbae238a68ac178112d6c901 /exti/SConscript | |
parent | b34efc66f164816d37d47f52efd591555eefdd5c (diff) |
stm32wb: exti: initial registers
Basic registers to start with, a lot of commonality, but extra registers
on the WB.
Signed-off-by <karlp@tweak.net.au>
Diffstat (limited to 'exti/SConscript')
-rw-r--r-- | exti/SConscript | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/exti/SConscript b/exti/SConscript new file mode 100644 index 0000000..b620818 --- /dev/null +++ b/exti/SConscript @@ -0,0 +1,21 @@ +Import('env') + +headers = [] +instances = [] +sources = [] +aliases = {} + +periph = env['PLATFORM_SPEC'].get('periph', {}) + +if 'stm32_exti' in periph: + headers.append('stm32_exti.h') + for name, data in periph['stm32_exti'].items(): + instances.append({ + 'type': 'STM32_EXTI_t<STM32_EXTI_reg_%s_t>' % data['type'], + 'name': name, + 'args': [data['offset']], + }) + +env.Jinja2('exti.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases) + +Return('sources') |