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authorVegard Storheil Eriksen <zyp@jvnv.net>2012-08-07 16:50:46 +0200
committerVegard Storheil Eriksen <zyp@jvnv.net>2012-08-07 16:50:46 +0200
commite586c178073b9a0fee90d5fc8e795d266ebd7b7d (patch)
treeca9a9c40bab37d5af440c80833755223e2bdd946 /gpio
Initial import.
Most sources are split off from suzumebachi project revision 2fc77d2 as is with some path changes. New build rules introduced.
Diffstat (limited to 'gpio')
-rw-r--r--gpio/gpio.h43
-rw-r--r--gpio/pin.h137
2 files changed, 180 insertions, 0 deletions
diff --git a/gpio/gpio.h b/gpio/gpio.h
new file mode 100644
index 0000000..324950e
--- /dev/null
+++ b/gpio/gpio.h
@@ -0,0 +1,43 @@
+#ifndef GPIO_H
+#define GPIO_H
+
+struct GPIO_t {
+ #if defined(STM32F1)
+ volatile uint32_t CRL;
+ volatile uint32_t CRH;
+ volatile uint32_t IDR;
+ volatile uint32_t ODR;
+ volatile uint32_t BSRR;
+ volatile uint32_t BRR;
+ volatile uint32_t LCKR;
+ #elif defined(STM32F4)
+ volatile uint32_t MODER;
+ volatile uint32_t OTYPER;
+ volatile uint32_t OSPEEDER;
+ volatile uint32_t PUPDR;
+ volatile uint32_t IDR;
+ volatile uint32_t ODR;
+ volatile uint32_t BSRR;
+ volatile uint32_t LCKR;
+ volatile uint32_t AFRL;
+ volatile uint32_t AFRH;
+ #endif
+};
+
+#if defined(STM32F1)
+static GPIO_t& GPIOA = *(GPIO_t*)0x40010800;
+static GPIO_t& GPIOB = *(GPIO_t*)0x40010c00;
+static GPIO_t& GPIOC = *(GPIO_t*)0x40011000;
+#elif defined(STM32F4)
+static GPIO_t& GPIOA = *(GPIO_t*)0x40020000;
+static GPIO_t& GPIOB = *(GPIO_t*)0x40020400;
+static GPIO_t& GPIOC = *(GPIO_t*)0x40020800;
+static GPIO_t& GPIOD = *(GPIO_t*)0x40020c00;
+static GPIO_t& GPIOE = *(GPIO_t*)0x40021000;
+static GPIO_t& GPIOF = *(GPIO_t*)0x40021400;
+static GPIO_t& GPIOG = *(GPIO_t*)0x40021800;
+static GPIO_t& GPIOH = *(GPIO_t*)0x40021c00;
+static GPIO_t& GPIOI = *(GPIO_t*)0x40022000;
+#endif
+
+#endif
diff --git a/gpio/pin.h b/gpio/pin.h
new file mode 100644
index 0000000..1ad3ca2
--- /dev/null
+++ b/gpio/pin.h
@@ -0,0 +1,137 @@
+#ifndef PIN_H
+#define PIN_H
+
+#include "gpio.h"
+
+class Pin {
+ private:
+ GPIO_t& g;
+ int n;
+
+ public:
+ Pin(GPIO_t& gpio, int pin) : g(gpio), n(pin) {}
+
+ enum Mode {
+ Input,
+ Output,
+ AF,
+ Analog,
+ };
+
+ enum Type {
+ PushPull,
+ OpenDrain,
+ };
+
+ enum Pull {
+ PullNone,
+ PullUp,
+ PullDown,
+ };
+
+ void set_mode(Mode m) {
+ g.MODER = (g.MODER & ~(3 << (n * 2))) | m << (n * 2);
+ }
+
+ void set_type(Type t) {
+ if(t) {
+ g.OTYPER |= 1 << n;
+ } else {
+ g.OTYPER &= ~(1 << n);
+ }
+ }
+
+ void set_pull(Pull p) {
+ g.PUPDR = (g.PUPDR & ~(3 << (n * 2))) | p << (n * 2);
+ }
+
+ void set_af(int af) {
+ if(n < 8) {
+ g.AFRL = (g.AFRL & ~(0xf << (n * 4))) | af << (n * 4);
+ } else {
+ g.AFRH = (g.AFRH & ~(0xf << (n * 4 - 32))) | af << (n * 4 - 32);
+ }
+ }
+
+ void on() {
+ g.BSRR = 1 << n;
+ }
+
+ void off() {
+ g.BSRR = 1 << 16 << n;
+ }
+
+ void set(bool value) {
+ if(value) {
+ on();
+ } else {
+ off();
+ }
+ }
+
+ bool get() {
+ return g.IDR & (1 << n);
+ }
+
+ void toggle() {
+ set(!(g.ODR & (1 << n)));
+ }
+};
+
+static Pin PA0(GPIOA, 0);
+static Pin PA1(GPIOA, 1);
+static Pin PA2(GPIOA, 2);
+static Pin PA3(GPIOA, 3);
+static Pin PA4(GPIOA, 4);
+static Pin PA5(GPIOA, 5);
+static Pin PA6(GPIOA, 6);
+static Pin PA7(GPIOA, 7);
+static Pin PA8(GPIOA, 8);
+static Pin PA9(GPIOA, 9);
+static Pin PA10(GPIOA, 10);
+static Pin PA11(GPIOA, 11);
+static Pin PA12(GPIOA, 12);
+static Pin PA13(GPIOA, 13);
+static Pin PA14(GPIOA, 14);
+static Pin PA15(GPIOA, 15);
+
+static Pin PB0(GPIOB, 0);
+static Pin PB1(GPIOB, 1);
+static Pin PB2(GPIOB, 2);
+static Pin PB3(GPIOB, 3);
+static Pin PB4(GPIOB, 4);
+static Pin PB5(GPIOB, 5);
+static Pin PB6(GPIOB, 6);
+static Pin PB7(GPIOB, 7);
+static Pin PB8(GPIOB, 8);
+static Pin PB9(GPIOB, 9);
+static Pin PB10(GPIOB, 10);
+static Pin PB11(GPIOB, 11);
+static Pin PB12(GPIOB, 12);
+static Pin PB13(GPIOB, 13);
+static Pin PB14(GPIOB, 14);
+static Pin PB15(GPIOB, 15);
+
+static Pin PC0(GPIOC, 0);
+static Pin PC1(GPIOC, 1);
+static Pin PC2(GPIOC, 2);
+static Pin PC3(GPIOC, 3);
+static Pin PC4(GPIOC, 4);
+static Pin PC5(GPIOC, 5);
+static Pin PC6(GPIOC, 6);
+static Pin PC7(GPIOC, 7);
+static Pin PC8(GPIOC, 8);
+static Pin PC9(GPIOC, 9);
+static Pin PC10(GPIOC, 10);
+static Pin PC11(GPIOC, 11);
+static Pin PC12(GPIOC, 12);
+static Pin PC13(GPIOC, 13);
+static Pin PC14(GPIOC, 14);
+static Pin PC15(GPIOC, 15);
+
+static Pin PD12(GPIOD, 12);
+static Pin PD13(GPIOD, 13);
+static Pin PD14(GPIOD, 14);
+static Pin PD15(GPIOD, 15);
+
+#endif