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authorKarl Palsson <karlp@tweak.net.au>2022-02-07 23:12:55 +0100
committerVegard Storheil Eriksen <zyp@jvnv.net>2022-04-16 21:37:28 +0200
commit3696c07f0707daa106d85ccd2b81fbad1adb22dd (patch)
tree5870b4364cee9d4d55e11129875f8bd4bd126d69 /pwr
parente115add00df34b9aabc97980dcb51204d624bd63 (diff)
stm32g4: initial platform support
Have some demo code using lptim, lpuart, exti and rtc mostly working. It glitches into undefined exceptions, so it's a little concerning, but... it's all cross checked against RM0440_rev7, so it's pretty good. Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Diffstat (limited to 'pwr')
-rw-r--r--pwr/stm32_pwr.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/pwr/stm32_pwr.h b/pwr/stm32_pwr.h
index bb46ffd..2c49be6 100644
--- a/pwr/stm32_pwr.h
+++ b/pwr/stm32_pwr.h
@@ -2,6 +2,26 @@
#include <mmio/mmio.h>
+struct STM32_PWR_PULL_PORT_t {
+ volatile uint32_t PUCR;
+ volatile uint32_t PDCR;
+};
+
+struct STM32_PWR_reg_g4_t {
+ volatile uint32_t CR1;
+ volatile uint32_t CR2;
+ volatile uint32_t CR3;
+ volatile uint32_t CR4;
+ volatile uint32_t SR1;
+ volatile uint32_t SR2;
+ volatile uint32_t SCR;
+ uint32_t _reserved1;
+ volatile struct STM32_PWR_PULL_PORT_t PUPD[7];
+ uint32_t _reserved2[10];
+ volatile uint32_t CR5;
+};
+
+
struct STM32_PWR_reg_wb_t {
volatile uint32_t CR1;
volatile uint32_t CR2;