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authorKarl Palsson <karlp@tweak.net.au>2022-02-07 23:12:55 +0100
committerVegard Storheil Eriksen <zyp@jvnv.net>2022-04-16 21:37:28 +0200
commit3696c07f0707daa106d85ccd2b81fbad1adb22dd (patch)
tree5870b4364cee9d4d55e11129875f8bd4bd126d69 /rcc
parente115add00df34b9aabc97980dcb51204d624bd63 (diff)
stm32g4: initial platform support
Have some demo code using lptim, lpuart, exti and rtc mostly working. It glitches into undefined exceptions, so it's a little concerning, but... it's all cross checked against RM0440_rev7, so it's pretty good. Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Diffstat (limited to 'rcc')
-rw-r--r--rcc/stm32_flash.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/rcc/stm32_flash.h b/rcc/stm32_flash.h
index ab88399..dddb1cf 100644
--- a/rcc/stm32_flash.h
+++ b/rcc/stm32_flash.h
@@ -52,6 +52,29 @@ struct STM32_FLASH_reg_l4_t {
volatile uint32_t WRP1BR;
};
+struct STM32_FLASH_reg_g4_t {
+ volatile uint32_t ACR;
+ volatile uint32_t PDKEYR;
+ volatile uint32_t KEYR;
+ volatile uint32_t OPTKEYR;
+ volatile uint32_t SR;
+ volatile uint32_t CR;
+ volatile uint32_t ECCR;
+ volatile uint32_t OPTR;
+ volatile uint32_t PCROP1SR;
+ volatile uint32_t PCROP1ER;
+ volatile uint32_t WRP1AR;
+ volatile uint32_t WRP1BR;
+ uint32_t _reserved1[4];
+ volatile uint32_t PCROP2SR;
+ volatile uint32_t PCROP2ER;
+ volatile uint32_t WRP2AR;
+ volatile uint32_t WRP2BR;
+ uint32_t _reserved2[7];
+ volatile uint32_t SEC1R;
+ volatile uint32_t SEC2R;
+};
+
struct STM32_FLASH_reg_wb_t {
volatile uint32_t ACR;
volatile uint32_t KEYR;