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authorKarl Palsson <karlp@etactica.com>2021-09-15 16:45:29 +0200
committerVegard Storheil Eriksen <zyp@jvnv.net>2021-09-16 20:29:55 +0200
commit41d7823059a9e81a8cf6ec7ed65eba6959b39ee4 (patch)
tree00c64540d38824fa4d5f130a7b14a2712eb208a1 /timer
parent891344a7f602e9431a52b89d32d3b5a8e2b0430c (diff)
timer: convert to new style and add WB
Stub f1 and f3 platform files have been added to preserve the collected timer base addresses, even though those platforms aren't actually supported in laks yet. Signed-off-by: Karl Palsson <karlp@etactica.com>
Diffstat (limited to 'timer')
-rw-r--r--timer/SConscript21
-rw-r--r--timer/stm32_timer.h33
-rw-r--r--timer/timer.h47
3 files changed, 54 insertions, 47 deletions
diff --git a/timer/SConscript b/timer/SConscript
new file mode 100644
index 0000000..7f5afbc
--- /dev/null
+++ b/timer/SConscript
@@ -0,0 +1,21 @@
+Import('env')
+
+headers = []
+instances = []
+sources = []
+aliases = {}
+
+periph = env['PLATFORM_SPEC'].get('periph', {})
+
+if 'stm32_timer' in periph:
+ headers.append('stm32_timer.h')
+ for name, data in periph['stm32_timer'].items():
+ instances.append({
+ 'type': 'STM32_TIMER_t<STM32_TIMER_reg_%s_t>' % data['type'],
+ 'name': name,
+ 'args': [data['offset']],
+ })
+
+env.Jinja2('timer.h', '../templates/periph_instances.h.j2', headers = headers, instances = instances, aliases = aliases)
+
+Return('sources')
diff --git a/timer/stm32_timer.h b/timer/stm32_timer.h
new file mode 100644
index 0000000..cbc966d
--- /dev/null
+++ b/timer/stm32_timer.h
@@ -0,0 +1,33 @@
+#pragma once
+
+#include <mmio/mmio.h>
+
+struct STM32_TIMER_reg_v1_t {
+ volatile uint32_t CR1;
+ volatile uint32_t CR2;
+ volatile uint32_t SMCR;
+ volatile uint32_t DIER;
+ volatile uint32_t SR;
+ volatile uint32_t EGR;
+ volatile uint32_t CCMR1;
+ volatile uint32_t CCMR2;
+ volatile uint32_t CCER;
+ volatile uint32_t CNT;
+ volatile uint32_t PSC;
+ volatile uint32_t ARR;
+ volatile uint32_t RCR;
+ volatile uint32_t CCR1;
+ volatile uint32_t CCR2;
+ volatile uint32_t CCR3;
+ volatile uint32_t CCR4;
+ volatile uint32_t BDTR;
+ volatile uint32_t DCR;
+ volatile uint32_t DMAR;
+};
+
+template <typename T>
+class STM32_TIMER_t : public mmio_ptr<T> {
+ public:
+ using mmio_ptr<T>::ptr;
+};
+
diff --git a/timer/timer.h b/timer/timer.h
deleted file mode 100644
index 54c0d37..0000000
--- a/timer/timer.h
+++ /dev/null
@@ -1,47 +0,0 @@
-#ifndef TIMER_H
-#define TIMER_H
-
-struct TIM_t {
- volatile uint32_t CR1;
- volatile uint32_t CR2;
- volatile uint32_t SMCR;
- volatile uint32_t DIER;
- volatile uint32_t SR;
- volatile uint32_t EGR;
- volatile uint32_t CCMR1;
- volatile uint32_t CCMR2;
- volatile uint32_t CCER;
- volatile uint32_t CNT;
- volatile uint32_t PSC;
- volatile uint32_t ARR;
- volatile uint32_t RCR;
- volatile uint32_t CCR1;
- volatile uint32_t CCR2;
- volatile uint32_t CCR3;
- volatile uint32_t CCR4;
- volatile uint32_t BDTR;
- volatile uint32_t DCR;
- volatile uint32_t DMAR;
-};
-
-#if defined(STM32F1) || defined(STM32F3)
-static TIM_t& TIM1 = *(TIM_t*)0x40012c00;
-static TIM_t& TIM2 = *(TIM_t*)0x40000000;
-static TIM_t& TIM3 = *(TIM_t*)0x40000400;
-static TIM_t& TIM4 = *(TIM_t*)0x40000800;
-static TIM_t& TIM5 = *(TIM_t*)0x40000c00;
-static TIM_t& TIM6 = *(TIM_t*)0x40001000;
-static TIM_t& TIM7 = *(TIM_t*)0x40001400;
-static TIM_t& TIM8 = *(TIM_t*)0x40013400;
-#elif defined(STM32F4)
-static TIM_t& TIM1 = *(TIM_t*)0x40010000;
-static TIM_t& TIM2 = *(TIM_t*)0x40000000;
-static TIM_t& TIM3 = *(TIM_t*)0x40000400;
-static TIM_t& TIM4 = *(TIM_t*)0x40000800;
-static TIM_t& TIM5 = *(TIM_t*)0x40000c00;
-static TIM_t& TIM6 = *(TIM_t*)0x40001000;
-static TIM_t& TIM7 = *(TIM_t*)0x40001400;
-static TIM_t& TIM8 = *(TIM_t*)0x40010400;
-#endif
-
-#endif