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authorKarl Palsson <karlp@etactica.com>2021-09-16 12:35:19 +0200
committerVegard Storheil Eriksen <zyp@jvnv.net>2021-09-16 20:29:55 +0200
commitd68a78807e7708c480b2fc9d34e1873714423aae (patch)
tree9aaf02e51945e525d5723e5f5a9dbc31d5040e96 /uart
parent3d4225f210c5b9545a3b4433c983d3a4ffa743a7 (diff)
uart: Add PRESC register on extended v2
L4+, G0, G4, WB and the "newer" parts use the usart-v2 registers, but add a new register at the end. Simply make it available for all v2 implementations. Signed-off-by: Karl Palsson <karlp@etactica.com>
Diffstat (limited to 'uart')
-rw-r--r--uart/stm32_uart.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/uart/stm32_uart.h b/uart/stm32_uart.h
index e4902a5..4c2a09d 100644
--- a/uart/stm32_uart.h
+++ b/uart/stm32_uart.h
@@ -24,6 +24,7 @@ struct STM32_UART_reg_v2_t {
volatile uint32_t ICR;
volatile uint32_t RDR;
volatile uint32_t TDR;
+ volatile uint32_t PRESC; // Gx, L4+, Wx etc
};
template <typename T>