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-rw-r--r--platforms/gd32v.yaml88
-rw-r--r--platforms/index.yaml10
-rw-r--r--platforms/riscv.yaml38
3 files changed, 136 insertions, 0 deletions
diff --git a/platforms/gd32v.yaml b/platforms/gd32v.yaml
new file mode 100644
index 0000000..34b2bf8
--- /dev/null
+++ b/platforms/gd32v.yaml
@@ -0,0 +1,88 @@
+- match:
+ mcu: !re gd32vf103
+ mem:
+ flash:
+ origin: 0x08000000
+ size: 128k
+
+ ram:
+ origin: 0x20000000
+ size: 32k
+
+ periph:
+ clic:
+ CLIC:
+ offset: 0xd2000000
+
+ dwc_otg:
+ OTG_FS:
+ offset: 0x50000000
+
+ rcc:
+ RCC:
+ offset: 0x40021000
+ type: f1
+ bus:
+ AHB:
+ 0: DMA1
+ 1: DMA2
+ 2: SRAM
+ 4: FLITF
+ 6: CRC
+ 8: FSMC
+ 10: SDIO
+ 12: USBFS
+
+ APB1:
+ 0: TIM2
+ 1: TIM3
+ 2: TIM4
+ 3: TIM5
+ 4: TIM6
+ 5: TIM7
+ 6: TIM12
+ 7: TIM13
+ 8: TIM14
+ 11: WWDG
+ 14: SPI2
+ 15: SPI3
+ 17: USART2
+ 18: USART3
+ 19: UART4
+ 20: UART5
+ 21: I2C1
+ 22: I2C2
+ 25: CAN
+ 27: BKP
+ 28: PWR
+ 29: DAC
+
+ APB2:
+ 0: AFIO
+ 2: GPIOA
+ 3: GPIOB
+ 4: GPIOC
+ 5: GPIOD
+ 6: GPIOE
+ 7: GPIOF
+ 8: GPIOG
+ 9: ADC1
+ 10: ADC2
+ 11: TIM1
+ 12: SPI1
+ 13: TIM8
+ 14: USART1
+ 15: ADC3
+ 19: TIM9
+ 20: TIM10
+ 21: TIM11
+
+ interrupt:
+ irq:
+ 56: USART1
+
+ define:
+ - STM32F1
+
+ meta:
+ cpu: rv32imac \ No newline at end of file
diff --git a/platforms/index.yaml b/platforms/index.yaml
index 558b535..15a83e6 100644
--- a/platforms/index.yaml
+++ b/platforms/index.yaml
@@ -4,6 +4,16 @@
-: !import stm32/index.yaml
- match:
+ mcu: !re gd32v
+
+ -: !import gd32v.yaml
+
+- match:
cpu: !re cortex-m
-: !import cortex-m.yaml
+
+- match:
+ cpu: !re rv
+
+ -: !import riscv.yaml \ No newline at end of file
diff --git a/platforms/riscv.yaml b/platforms/riscv.yaml
new file mode 100644
index 0000000..ec9ecd7
--- /dev/null
+++ b/platforms/riscv.yaml
@@ -0,0 +1,38 @@
+- match:
+ cpu: rv32imac
+
+ cflags:
+ - -march=rv32imac
+ - -mabi=ilp32
+ - -msmall-data-limit=0
+
+ interrupt:
+ exception:
+ 0: InstructionMisaligned
+ 1: InstructionFault
+ 2: IllegalInstruction
+ 3: Breakpoint
+ 4: LoadMisaligned
+ 5: LoadFault
+ 6: StoreMisaligned
+ 7: StoreFault
+ 8: ECall_U
+ 9: ECall_S
+ 11: ECall_M
+ 12: InstructionPageFault
+ 13: LoadPageFault
+ 15: StorePageFault
+
+ internal:
+ 0: USI
+ 1: SSI
+ 3: MSI
+ 4: UTI
+ 5: STI
+ 7: MTI
+ 8: UEI
+ 9: SEI
+ 11: MEI
+
+ toolchains:
+ - riscv64-unknown-elf