diff options
Diffstat (limited to 'main.cpp')
-rw-r--r-- | main.cpp | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/main.cpp b/main.cpp new file mode 100644 index 0000000..eab4e69 --- /dev/null +++ b/main.cpp @@ -0,0 +1,89 @@ +#include <rcc/rcc.h> +#include <gpio/pin.h> +#include <spi/spi.h> +#include <os/time.h> + +Pin& noe = PA3; +Pin& vsync = PA4; +Pin& clk = PA5; // SCK +Pin& hsync = PA6; +Pin& data = PA7; // MOSI + +inline void nopdelay(uint32_t iterations) { + while(iterations--) { + asm volatile("nop"); + } +} + +uint32_t buf[] = { + 0b1001010100000000, + 0b1001010100000000, + 0b1111010100000000, + 0b1001010000000000, + 0b1001010100000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, + 0b0000000000000000, +}; + +int main() { + // Initialize system timer. + STK.LOAD = 168000000 / 8 / 1000; // 1000 Hz. + STK.CTRL = 0x03; + + RCC.enable(RCC.GPIOA); + RCC.enable(RCC.SPI1); + + noe.set_mode(Pin::Output); + noe.off(); + + hsync.set_mode(Pin::Output); + hsync.off(); + + vsync.set_mode(Pin::Output); + vsync.on(); + + clk.set_mode(Pin::AF); + clk.set_af(5); + + data.set_mode(Pin::AF); + data.set_af(5); + + SPI1.reg.CR1 = 0xbfc; + + uint32_t row = 0; + + while(1) { + // Shift out a row. + SPI1.reg.DR = buf[row]; + while(!(SPI1.reg.SR & 0x01)); + (void)SPI1.reg.DR; + + // Assert vsync if this is first row. + if(row == 0) { + vsync.off(); + } + + // Strobe hsync. + hsync.on(); + nopdelay(10); + hsync.off(); + + // Deassert vsync. + if(row == 0) { + vsync.on(); + } + + Time::sleep(1); + + row = (row + 1) & 0xf; + } +} |