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author | Atle H. Havsø <atle@havso.net> | 2014-07-24 11:20:18 +0200 |
---|---|---|
committer | Atle H. Havsø <atle@havso.net> | 2014-07-24 11:20:18 +0200 |
commit | 79f7c128bb43c9d4598a9d373dc570a04733e2b1 (patch) | |
tree | 982d1182b15d031cfd7c2897c4e9613e201e740e | |
parent | fab8321b68896a8a9ff085586652ed4d834ba173 (diff) |
Changes needed for afro-card.temp_suzumebachi
-rw-r--r-- | rcc/rcc.cpp | 2 | ||||
-rw-r--r-- | spi/spi.h | 10 |
2 files changed, 7 insertions, 5 deletions
diff --git a/rcc/rcc.cpp b/rcc/rcc.cpp index 7e711f9..c5eab44 100644 --- a/rcc/rcc.cpp +++ b/rcc/rcc.cpp @@ -12,7 +12,7 @@ void rcc_init() { while(!(RCC.CR & 0x20000)); // Configure and enable PLL. - RCC.CFGR = 0x1d0000; + RCC.CFGR = (4 << 18) | (1 << 16); // PLLMUL = x6, PLLSRC = HSE RCC.CR |= 0x1000000; while(!(RCC.CR & 0x2000000)); @@ -7,7 +7,10 @@ struct SPI_reg_t { volatile uint32_t CR1; volatile uint32_t CR2; volatile uint32_t SR; - volatile uint32_t DR; + union { + volatile uint32_t DR; + volatile uint8_t DR8; + }; volatile uint32_t CRCPR; volatile uint32_t RXCRCR; volatile uint32_t TXCRCR; @@ -22,13 +25,12 @@ class SPI_t { SPI_t(uint32_t reg_addr) : reg(*(SPI_reg_t*)reg_addr) {} uint8_t transfer_byte(uint8_t out = 0) { - reg.DR = out; + reg.DR8 = out; while(!(reg.SR & 0x01)) { Thread::yield(); } - - return reg.DR; + return reg.DR8; } }; |