Started rewrite from scratch.

8 files changed, 234 insertions, 4 deletions

diff --git a/.gdbinit b/.gdbinit
new file mode 100644
index 0000000..6b85ea0
--- /dev/null
+++ b/.gdbinit
@@ -0,0 +1 @@
+target remote localhost:3333
diff --git a/SConstruct b/SConstruct
index e95673e..a13059a 100644
--- a/SConstruct
+++ b/SConstruct
@@ -13,7 +13,7 @@ env = Environment(
 	#CPPDEFINES = [],

 	

 	LINK = 'arm-none-eabi-gcc',

-	LINKFLAGS = '-Wall -mcpu=cortex-m3 -mthumb -Wl,-Tch.ld', # -Wl,--gc-sections

+	LINKFLAGS = '-Wall -mcpu=cortex-m3 -mthumb -nostartfiles -Wl,-Tsuzumebachi.ld', # -Wl,--gc-sections

 	

 	AR = 'arm-none-eabi-ar',

 	RANLIB = 'arm-none-eabi-ranlib',

@@ -33,8 +33,9 @@ sources = \
 	Glob('chibios/os/hal/src/*.c') + \

 	Glob('chibios/os/hal/platforms/STM32/*.c')

 

-firmware = env.Program('suzumebachi.elf', Glob('*.cpp') + Glob('*.c') + sources)

-env.Depends(firmware, 'ch.ld')

+#firmware = env.Program('suzumebachi.elf', Glob('*.cpp') + Glob('*.c') + sources)

+firmware = env.Program('suzumebachi.elf', ['main.cpp', 'entry.cpp', 'rcc.cpp'])

+env.Depends(firmware, 'suzumebachi.ld')

 

 env.Command('prog', ['suzumebachi.elf'], 'openocd -f openocd.cfg -c flash_chip')

 

diff --git a/entry.cpp b/entry.cpp
new file mode 100644
index 0000000..4faca0e
--- /dev/null
+++ b/entry.cpp
@@ -0,0 +1,41 @@
+#include <stdint.h>
+#include "rcc.h"
+
+int main();
+
+// Symbols from linker script.
+extern uint32_t _data_rom;
+extern uint32_t _data_start;
+extern uint32_t _data_end;
+extern uint32_t _bss_start;
+extern uint32_t _bss_end;
+
+void __attribute__((naked)) entry() {
+	// Initialize clock.
+	rcc_init();
+	
+	// Load .data from rom image.
+	uint32_t* rp = &_data_rom;
+	uint32_t* wp = &_data_start;
+	
+	while(wp < &_data_end) {
+		*wp++ = *rp++;
+	}
+	
+	// Clear .bss.
+	wp = &_bss_start;
+	
+	while(wp < &_bss_end) {
+		*wp++ = 0;
+	}
+	
+	// Call constructors.
+	
+	// Call main().
+	main();
+	
+	// Call destructors.
+	
+	// Halt.
+	while(1);
+}
diff --git a/main.cpp b/main.cpp
index 340817c..22ff85a 100644
--- a/main.cpp
+++ b/main.cpp
@@ -1,3 +1,30 @@
+#include "stm32.h"
+
+void entry();
+
+void* vectors[4] __attribute__((section(".vectors"))) = {
+	(void*)0x20004ffc,
+	(void*)entry
+	//(unsigned int *)	STACK_TOP,         // stack pointer
+	//(unsigned int *)	main,              // code entry point
+	//(unsigned int *)	nmi_handler,       // NMI handler (not really)
+	//(unsigned int *)	hardfault_handler  // hard fault handler (let's hope not)
+};
+
+volatile unsigned int cnt;
+
+int main() {
+	RCC.APB2ENR |= 0x5;
+	
+	GPIOA.CRL = 0x44344444;
+	GPIOA.ODR = 1 << 5;
+	
+	while(1) {
+		cnt++;
+	}
+}
+
+/*
 #include "thread.h"
 #include "usbserial.h"
 #include "itg3200.h"
@@ -153,7 +180,7 @@ class I2CThread : public BaseThread<I2CThread, 256> {
 					acc.x, acc.y, acc.z,
 					magn.x, magn.y, magn.z,
 					int(q0 * 10000), int(q1 * 10000), int(q2 * 10000), int(q3 * 10000),
-					int(pitch * 10000), int(roll * 10000), int(yaw * 10000));*/
+					int(pitch * 10000), int(roll * 10000), int(yaw * 10000));*//*
 				
 				int16_t pitch_angle_target = (ppmsum.data[1] - 500) * 8;
 				int16_t roll_angle_target = (ppmsum.data[0] - 500) * 8;
@@ -251,3 +278,4 @@ int main(void) {
 		chThdSleepMilliseconds(1000);
 	}
 }
+*/
\ No newline at end of file
diff --git a/rcc.cpp b/rcc.cpp
new file mode 100644
index 0000000..79bbc69
--- /dev/null
+++ b/rcc.cpp
@@ -0,0 +1,23 @@
+#include "rcc.h"
+#include "stm32.h"
+
+void rcc_init() {
+	// Set flash latency.
+	FLASH.ACR = 0x12;
+	
+	// Enable HSE.
+	RCC.CR |= 0x10000;
+	while(RCC.CR & 0x20000);
+	
+	// Configure and enable PLL.
+	RCC.CFGR = 0x1d0000;
+	RCC.CR |= 0x1000000;
+	while(RCC.CR & 0x2000000);
+	
+	// Switch to PLL.
+	RCC.CFGR |= 0x2;
+	while(!(RCC.CFGR & 0x8));
+	
+	// Set APB1 prescaler to /2.
+	RCC.CFGR |= 0x400;
+}
diff --git a/rcc.h b/rcc.h
new file mode 100644
index 0000000..8c5fb86
--- /dev/null
+++ b/rcc.h
@@ -0,0 +1,6 @@
+#ifndef RCC_H
+#define RCC_H
+
+void rcc_init();
+
+#endif
diff --git a/stm32.h b/stm32.h
new file mode 100644
index 0000000..9b8ec59
--- /dev/null
+++ b/stm32.h
@@ -0,0 +1,47 @@
+#ifndef STM32_H
+#define STM32_H
+
+#include <stdint.h>
+
+struct RCC_t {
+	volatile uint32_t CR;
+	volatile uint32_t CFGR;
+	volatile uint32_t CIR;
+	volatile uint32_t APB2RSTR;
+	volatile uint32_t APB1RSTR;
+	volatile uint32_t AHBENR;
+	volatile uint32_t APB2ENR;
+	volatile uint32_t APB1ENR;
+	volatile uint32_t BDCR;
+	volatile uint32_t CSR;
+};
+
+static RCC_t& RCC = *(RCC_t*)0x40021000;
+
+struct FLASH_t {
+	volatile uint32_t ACR;
+	volatile uint32_t KEYR;
+	volatile uint32_t OPTKEYR;
+	volatile uint32_t SR;
+	volatile uint32_t CR;
+	volatile uint32_t AR;
+	volatile uint32_t RESERVED;
+	volatile uint32_t OBR;
+	volatile uint32_t WRPR;
+};
+
+static FLASH_t& FLASH = *(FLASH_t*)0x40022000;
+
+struct GPIO_t {
+	volatile uint32_t CRL;
+	volatile uint32_t CRH;
+	volatile uint32_t IDR;
+	volatile uint32_t ODR;
+	volatile uint32_t BSRR;
+	volatile uint32_t BRR;
+	volatile uint32_t LCKR;
+};
+
+static GPIO_t& GPIOA = *(GPIO_t*)0x40010800;
+
+#endif
diff --git a/suzumebachi.ld b/suzumebachi.ld
new file mode 100644
index 0000000..4903bd9
--- /dev/null
+++ b/suzumebachi.ld
@@ -0,0 +1,83 @@
+MEMORY {

+	flash (rx) : org = 0x08000000, len = 128k

+	ram (rwx)  : org = 0x20000000, len = 20k

+}

+

+_ram_start = ORIGIN(ram);

+_ram_size = LENGTH(ram);

+_ram_end = _ram_start + _ram_size;

+

+SECTIONS {

+	. = 0;

+	

+	.vectors : ALIGN(16) SUBALIGN(16) {

+		KEEP(*(.vectors))

+	} > flash

+	

+	.init_array : ALIGN(4) SUBALIGN(4) {

+		PROVIDE(_init_array_start = .);

+		KEEP(*(SORT(.init_array.*)))

+		KEEP(*(.init_array))

+		PROVIDE(_init_array_end = .);

+	} > flash

+	

+	.fini_array : ALIGN(4) SUBALIGN(4) {

+		PROVIDE(_fini_array_start = .);

+		KEEP(*(.fini_array))

+		KEEP(*(SORT(.fini_array.*)))

+		PROVIDE(_fini_array_end = .);

+	} > flash

+	

+	.text : ALIGN(16) SUBALIGN(16) {

+		*(.text.startup.*)

+		*(.text)

+		*(.text.*)

+		*(.rodata)

+		*(.rodata.*)

+		*(.glue_7t)

+		*(.glue_7)

+		*(.gcc*)

+	} > flash

+	

+	.ARM.extab : {

+		*(.ARM.extab* .gnu.linkonce.armextab.*)

+	} > flash

+	

+	.ARM.exidx : {

+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)

+	} > flash

+	

+	.eh_frame_hdr : {

+		*(.eh_frame_hdr)

+	} > flash

+	

+	.eh_frame : ONLY_IF_RO {

+		*(.eh_frame)

+	} > flash

+	

+	. = ALIGN(4);

+	

+	PROVIDE(_data_rom = .);

+	

+	.data : {

+		PROVIDE(_data_start = .);

+		*(.data)

+		. = ALIGN(4);

+		*(.data.*)

+		. = ALIGN(4);

+		*(.ramtext)

+		. = ALIGN(4);

+		PROVIDE(_data_end = .);

+	} > ram AT > flash

+	

+	.bss : {

+		PROVIDE(_bss_start = .);

+		*(.bss)

+		. = ALIGN(4);

+		*(.bss.*)

+		. = ALIGN(4);

+		*(COMMON)

+		. = ALIGN(4);

+		PROVIDE(_bss_end = .);

+	} > ram    

+}