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#ifndef INTERRUPT_H
#define INTERRUPT_H

#include "stm32.h"

namespace Interrupt {
	enum Exception {
		NMI        = 2,
		HardFault  = 3,
		MemManage  = 4,
		BusFault   = 5,
		UsageFault = 6,
		SVCall     = 11,
		PendSV     = 14,
		SysTick    = 15
	};
	
	enum IRQ {
		WWDG,
		PVD,
		TAMPER,
		RTC,
		FLASH,
		RCC,
		EXTI0,
		EXTI1,
		EXTI2,
		EXTI3,
		EXTI4,
		DMA1_Channel1,
		DMA1_Channel2,
		DMA1_Channel3,
		DMA1_Channel4,
		DMA1_Channel5,
		DMA1_Channel6,
		DMA1_Channel7,
		ADC1_2,
		USB_HP_CAN_TX,
		USB_LP_CAN_RX0,
		CAN_RX1,
		CAN_SCE,
		EXTI9_5,
		TIM1_BRK,
		TIM1_UP,
		TIM1_TRG_COM,
		TIM1_CC,
		TIM2,
		TIM3,
		TIM4,
		I2C1_EV,
		I2C1_ER,
		I2C2_EV,
		I2C2_ER,
		SPI1,
		SPI2,
		USART1,
		USART2,
		USART3,
		EXTI15_10,
		RTCAlarm,
		USBWakeup,
		TIM8_BRK,
		TIM8_UP,
		TIM8_TRG_COM,
		TIM8_CC,
		ADC3,
		FSMC,
		SDIO,
		TIM5,
		SPI3,
		UART4,
		UART5,
		TIM6,
		TIM7,
		DMA2_Channel1,
		DMA2_Channel2,
		DMA2_Channel3,
		DMA2_Channel4_5
	};
	
	inline void enable(IRQ n) {
		NVIC.ISER[n >> 5] = 1 << (n & 0x1f);
	}
	
	inline void set_priority(Exception n, uint8_t priority) {
		SCB.SHPR[n >> 2] = (priority & 0xf) << ((n & 0x03) * 4);
	}
	
	inline void set_priority(IRQ n, uint8_t priority) {
		NVIC.IPR[n] = priority;
	}
};

template<Interrupt::Exception>
void interrupt();

template<Interrupt::IRQ>
void interrupt();

#endif