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authorVegard Storheil Eriksen <zyp@jvnv.net>2011-12-03 19:39:24 +0100
committerVegard Storheil Eriksen <zyp@jvnv.net>2011-12-03 19:39:24 +0100
commit5b6df900dd63f7a2022c899aee9dc13fd82a1e5c (patch)
treee3565ffeadc4841202b1bb1d5e0d26b49d3088d3 /hal
parentf886d12a39d3d9c293eb87aa239165f1f52cd9f0 (diff)
Moved GPIO register definition into seperate header.
Diffstat (limited to 'hal')
-rw-r--r--hal/gpio.h43
-rw-r--r--hal/stm32.h39
2 files changed, 43 insertions, 39 deletions
diff --git a/hal/gpio.h b/hal/gpio.h
new file mode 100644
index 0000000..324950e
--- /dev/null
+++ b/hal/gpio.h
@@ -0,0 +1,43 @@
+#ifndef GPIO_H
+#define GPIO_H
+
+struct GPIO_t {
+ #if defined(STM32F1)
+ volatile uint32_t CRL;
+ volatile uint32_t CRH;
+ volatile uint32_t IDR;
+ volatile uint32_t ODR;
+ volatile uint32_t BSRR;
+ volatile uint32_t BRR;
+ volatile uint32_t LCKR;
+ #elif defined(STM32F4)
+ volatile uint32_t MODER;
+ volatile uint32_t OTYPER;
+ volatile uint32_t OSPEEDER;
+ volatile uint32_t PUPDR;
+ volatile uint32_t IDR;
+ volatile uint32_t ODR;
+ volatile uint32_t BSRR;
+ volatile uint32_t LCKR;
+ volatile uint32_t AFRL;
+ volatile uint32_t AFRH;
+ #endif
+};
+
+#if defined(STM32F1)
+static GPIO_t& GPIOA = *(GPIO_t*)0x40010800;
+static GPIO_t& GPIOB = *(GPIO_t*)0x40010c00;
+static GPIO_t& GPIOC = *(GPIO_t*)0x40011000;
+#elif defined(STM32F4)
+static GPIO_t& GPIOA = *(GPIO_t*)0x40020000;
+static GPIO_t& GPIOB = *(GPIO_t*)0x40020400;
+static GPIO_t& GPIOC = *(GPIO_t*)0x40020800;
+static GPIO_t& GPIOD = *(GPIO_t*)0x40020c00;
+static GPIO_t& GPIOE = *(GPIO_t*)0x40021000;
+static GPIO_t& GPIOF = *(GPIO_t*)0x40021400;
+static GPIO_t& GPIOG = *(GPIO_t*)0x40021800;
+static GPIO_t& GPIOH = *(GPIO_t*)0x40021c00;
+static GPIO_t& GPIOI = *(GPIO_t*)0x40022000;
+#endif
+
+#endif
diff --git a/hal/stm32.h b/hal/stm32.h
index 3f39bed..c487cd4 100644
--- a/hal/stm32.h
+++ b/hal/stm32.h
@@ -273,45 +273,6 @@ static FLASH_t& FLASH = *(FLASH_t*)0x40022000;
static FLASH_t& FLASH = *(FLASH_t*)0x40023c00;
#endif
-struct GPIO_t {
- #if defined(STM32F1)
- volatile uint32_t CRL;
- volatile uint32_t CRH;
- volatile uint32_t IDR;
- volatile uint32_t ODR;
- volatile uint32_t BSRR;
- volatile uint32_t BRR;
- volatile uint32_t LCKR;
- #elif defined(STM32F4)
- volatile uint32_t MODER;
- volatile uint32_t OTYPER;
- volatile uint32_t OSPEEDER;
- volatile uint32_t PUPDR;
- volatile uint32_t IDR;
- volatile uint32_t ODR;
- volatile uint32_t BSRR;
- volatile uint32_t LCKR;
- volatile uint32_t AFRL;
- volatile uint32_t AFRH;
- #endif
-};
-
-#if defined(STM32F1)
-static GPIO_t& GPIOA = *(GPIO_t*)0x40010800;
-static GPIO_t& GPIOB = *(GPIO_t*)0x40010c00;
-static GPIO_t& GPIOC = *(GPIO_t*)0x40011000;
-#elif defined(STM32F4)
-static GPIO_t& GPIOA = *(GPIO_t*)0x40020000;
-static GPIO_t& GPIOB = *(GPIO_t*)0x40020400;
-static GPIO_t& GPIOC = *(GPIO_t*)0x40020800;
-static GPIO_t& GPIOD = *(GPIO_t*)0x40020c00;
-static GPIO_t& GPIOE = *(GPIO_t*)0x40021000;
-static GPIO_t& GPIOF = *(GPIO_t*)0x40021400;
-static GPIO_t& GPIOG = *(GPIO_t*)0x40021800;
-static GPIO_t& GPIOH = *(GPIO_t*)0x40021c00;
-static GPIO_t& GPIOI = *(GPIO_t*)0x40022000;
-#endif
-
struct I2C_t {
volatile uint32_t CR1;
volatile uint32_t CR2;